스마트 카드 에뮬레이터 및 그 에뮬레이션 방법
    171.
    发明授权
    스마트 카드 에뮬레이터 및 그 에뮬레이션 방법 失效
    스마트카드레이터및그에뮬레이션방법

    公开(公告)号:KR100426304B1

    公开(公告)日:2004-04-08

    申请号:KR1020010057083

    申请日:2001-09-17

    Abstract: PURPOSE: A smart card emulator and an emulation method thereof are provided to effectively develop a contact/non-contact smart card and a USB(Universal Serial Bus) card through the simple design modification of a hardware logic. CONSTITUTION: The smart card emulator includes a computer(100), a controlling block(202), two ports(204,208), the first memory block(206), the second memory block(210), a clock generating block(212), a signal processing block(214) and an interface block(216). The controlling block(202) performs entire control needed to perform the emulation of the smart card. The first memory block(206) stores a VHDL(VHSIC(Very High Speed IC) Hardware Description Language) code needed to design the hardware logic. The second memory block(210) comprises an SRAM reading and writing the contents according to the execution of the emulator, a ROM storing an OS(Operating System) program of the emulator and an EEPROM(Electronically Erasable Programmable ROM) storing various application programs. The signal processing block(214) is an FPGA(Field Programmable Gate Array) for realizing a user defined additional function module.

    Abstract translation: 目的:提供一种智能卡仿真器及其仿真方法,通过对硬件逻辑的简单设计修改来有效地开发接触/非接触智能卡和USB(通用串行总线)卡。 本发明的智能卡仿真器包括计算机(100),控制块(202),两个端口(204,208),第一存储器块(206),第二存储器块(210),时钟生成块(212) 信号处理块(214)和接口块(216)。 控制块(202)执行执行智能卡仿真所需的全部控制。 第一存储块(206)存储设计硬件逻辑所需的VHDL(VHSIC(超高速IC)硬件描述语言)代码。 第二存储器块(210)包括根据仿真器的执行读取和写入内容的SRAM,存储仿真器的OS(操作系统)程序的ROM和存储各种应用程序的EEPROM(电子可擦除可编程ROM)。 信号处理块(214)是用于实现用户定义的附加功能模块的FPGA(现场可编程门阵列)。

    다종의 비접촉형 전자화폐용 IC카드를 이용한 통행요금및 주차요금 통합 지불 시스템 및 방법
    172.
    发明公开
    다종의 비접촉형 전자화폐용 IC카드를 이용한 통행요금및 주차요금 통합 지불 시스템 및 방법 有权
    通过使用集成电路卡在多类非接触式电子货币中使用的托盘和停车费的集成支付系统及其相关方法

    公开(公告)号:KR1020030094911A

    公开(公告)日:2003-12-18

    申请号:KR1020020032258

    申请日:2002-06-10

    CPC classification number: G07B15/02 G06K19/0723 G06K2017/0067 G07B15/06

    Abstract: PURPOSE: A integration payment system of a toll and a parking fee by using an integrated circuit(IC) card for use in a multi type non-contact electronic money and a method for the same are provided to have an additional requirement for the payment system to each of the toll payment system and the parking fee payment system by integrating each of the systems. CONSTITUTION: A integration payment system of a toll and a parking fee by using an integrated circuit(IC) card for use in a multi type non-contact electronic money includes a plurality of non-contact electronic money IC card(200), a vehicle enter monitoring unit(103), a vehicle classifier(104), a gate number and time setting unit(106), a fee calculation unit(107), a card read and communication unit(101) and a secure application module(SAM)(102). The fee calculation unit(107) calculates the IC card transaction fee by using the sensed vehicle kind, the in and out gate number of the set vehicle gate and/or the time of the in and out vehicle. The card read and communication unit(101) recognizes the non-contact electronic money IC card and communicates with the non-contact electronic money IC card. And, the secure application module(SAM)(102) performs the authentication with the IC card by using the key set of the non-contact electronic money IC card.

    Abstract translation: 目的:提供通过使用用于多种非接触式电子货币的集成电路(IC)卡的收费和停车费的一体化支付系统及其方法,以对支付系统有额外要求 通过对每个系统进行集成,对每个通行费系统和停车费支付系统。 构成:通过使用用于多种非接触式电子货币的集成电路(IC)卡的收费和停车费的一体化支付系统包括多个非接触式电子货币IC卡(200),车辆 输入监视单元(103),车辆分类器(104),门号和时间设定单元(106),费用计算单元(107),卡读取和通信单元(101)和安全应用模块(SAM) (102)。 费用计算单元(107)通过使用所感测的车辆种类,所设定的车辆门的进出门数和/或进出车辆的时间来计算IC卡交易费用。 卡读取和通信单元(101)识别非接触式电子货币IC卡并与非接触式电子货币IC卡进行通信。 并且,安全应用模块(SAM)(102)通过使用非接触式电子货币IC卡的密钥组来执行与IC卡的认证。

    대칭 및 비대칭키 암호 연산 처리 시스템 및 그 처리 방법
    173.
    发明授权
    대칭 및 비대칭키 암호 연산 처리 시스템 및 그 처리 방법 失效
    대칭및비대칭키암호연산처리시스템및그처리방

    公开(公告)号:KR100406139B1

    公开(公告)日:2003-11-14

    申请号:KR1020010074634

    申请日:2001-11-28

    Abstract: PURPOSE: A symmetric and asymmetric key cryptography operation process system and a processing method thereof are provided to process various kinds of ciphering algorithm by using the cryptographic operation process system including hardware circuits of small number. CONSTITUTION: A command extraction portion(130) extracts a command for performing a cryptographic operation when commands and data for a ciphering algorithm are received from an external network. A scheduler and decoder portion(120) decides a calculation method and schedules an executing order by analyzing an input command according to the extracted command and the data. A storage portion(140) stores the extracted command and the data received from the external network. A cryptographic operation portion(160) processes a symmetric and an asymmetric cryptographic operation by performing the stored command according to the scheduled executing order. A control portion(150) controls the cryptographic operation portion.

    Abstract translation: 目的:提供一种对称和非对称密钥密码操作处理系统及其处理方法,以通过使用包括少数的硬件电路的密码操作处理系统处理各种加密算法。 构成:当从外部网络接收到用于加密算法的命令和数据时,命令提取部分(130)提取用于执行密码操作的命令。 调度器和解码器部分(120)根据提取的命令和数据通过分析输入命令来决定计算方法并调度执行顺序。 存储部分(140)存储提取的命令和从外部网络接收的数据。 密码操作部分(160)通过根据所安排的执行次序执行所存储的命令来处理对称密码操作和非对称密码操作。 控制部分(150)控制密码操作部分。

    아이씨카드용 알에스에이 암호 연산 장치
    174.
    发明公开
    아이씨카드용 알에스에이 암호 연산 장치 失效
    操作员RSA加密IC卡

    公开(公告)号:KR1020030051992A

    公开(公告)日:2003-06-26

    申请号:KR1020010081717

    申请日:2001-12-20

    CPC classification number: G06F21/72 G06F7/72 G06F7/728

    Abstract: PURPOSE: An operator RSA(Rivest-Shamir-Adelman) encryption of an IC card is provided to selectively carry out a modular multiplication operation or a modular exponent multiplication operation according to a control signal, and to realize a high speed encryption operation through the minimal access to a memory by storing a middle value in an internal register instead of the memory. CONSTITUTION: An interface(120) transmits/receives the control signal and the encryption operation transmitted from a processor of an IC card system. A control register(130) stores the information for controlling an operation mode according to the control signal. An input register(140) previously reads and stores the data from the memory(110) according to the information stored in the control register(130). A modular part(160) carries out the modular operation and the modular exponent operation by reading the value stored in the input register(140). A controller(140) stores the control signal from the IC card processor in the control register(130), and generates the control signal by offering the data from the memory(110) to the modular part(160).

    Abstract translation: 目的:提供IC卡的操作员RSA(Rivest-Shamir-Adelman)加密,以根据控制信号有选择地执行模乘法或模数乘法运算,并通过最小化实现高速加密操作 通过在内部寄存器中存储中间值而不是存储器来访问存储器。 构成:接口(120)发送/接收从IC卡系统的处理器发送的控制信号和加密操作。 控制寄存器(130)根据控制信号存储用于控制操作模式的信息。 输入寄存器(140)根据存储在控制寄存器(130)中的信息,先前从存储器(110)读取并存储数据。 模块化部件(160)通过读取存储在输入寄存器(140)中的值来执行模数运算和模数运算。 控制器(140)将来自IC卡处理器的控制信号存储在控制寄存器(130)中,并通过将数据从存储器(110)提供给模块化部件(160)来产生控制信号。

    엔티알유 암/복호화 장치
    175.
    发明公开
    엔티알유 암/복호화 장치 失效
    NTRU编码/解码设备

    公开(公告)号:KR1020030043448A

    公开(公告)日:2003-06-02

    申请号:KR1020010074631

    申请日:2001-11-28

    CPC classification number: H04L9/3093

    Abstract: PURPOSE: An NTRU encoding/decoding device is provided to perform efficiently an NTRU encoding/decoding process by improving a structure of the NTRU encoding/decoding device. CONSTITUTION: The first storage portion(12) stores an input message for NTRU encoding and a secret key for NTRU decoding. The second storage portion(13) stores an input value of a polynomial expression using p as a modular value of a coefficient. The third storage portion(14) stores an input value of a polynomial expression using q as a modular value of a coefficient. An NTRU calculation portion(16) performs an NTRU cryptographic calculation and a decoding calculation for values of the first to the third storage portions. The fourth storage portion(17) stores an output value of the NTRU calculation portion. An output selection portion(18) determines an output operation of the fourth storage portion. A modular calculation portion(19) performs a modular calculation process for an output value of the output selection portion. An NTRU control portion(15) controls each register and the NTRU calculation portion.

    Abstract translation: 目的:提供NTRU编码/解码装置,通过改进NTRU编码/解码装置的结构来有效地执行NTRU编码/解码处理。 构成:第一存储部分(12)存储用于NTRU编码的输入消息和用于NTRU解码的秘密密钥。 第二存储部(13)使用p作为系数的模块值来存储多项式表达式的输入值。 第三存储部分(14)使用q作为系数的模块值来存储多项式表达式的输入值。 NTRU计算部分(16)对第一至第三存储部分的值执行NTRU密码计算和解码计算。 第四存储部(17)存储NTRU计算部的输出值。 输出选择部分(18)确定第四存储部分的输出操作。 模块化计算部分(19)对输出选择部分的输出值执行模块化计算处理。 NTRU控制部分(15)控制每个寄存器和NTRU计算部分。

    고속 하드웨어 암호 처리 시스템 및 그 방법
    176.
    发明公开
    고속 하드웨어 암호 처리 시스템 및 그 방법 失效
    高速硬质结构加工系统及其方法

    公开(公告)号:KR1020030043447A

    公开(公告)日:2003-06-02

    申请号:KR1020010074630

    申请日:2001-11-28

    Abstract: PURPOSE: A high-speed hardware cryptographic processing system and a method thereof are provided to enhance the performance of a cryptographic process by performing a symmetric key and an asymmetric key ciphering algorithm in parallel. CONSTITUTION: A scheduler(120) is used for generating the scheduling information for an executing procedure of a ciphering algorithm. A storage portion(130) stores rearranged command, rearrangement information, and the address information of the cryptographic data according to the scheduling information. A cryptographic processing portion(150) reads the stored data of the storage portion and performs a cryptographic process according to the command priority by referring to the command rearrangement information and the address information. A control portion(140) outputs a command to generate the scheduling information, sort cryptographic data, assign the data, and perform the cryptographic process.

    Abstract translation: 目的:提供一种高速硬件加密处理系统及其方法,用于通过并行执行对称密钥和非对称密钥加密算法来增强密码处理的性能。 构成:调度器(120)用于生成用于加密算法的执行过程的调度信息。 存储部(130)根据调度信息存储重新排列的命令,重排信息和密码数据的地址信息。 加密处理部(150)通过参照命令重排信息和地址信息读取存储部分的存储数据,并根据命令优先级执行密码处理。 控制部(140)输出生成调度信息的命令,分类密码数据,分配数据,进行密码处理。

    아이씨 카드용 전원 공급 장치
    177.
    发明公开
    아이씨 카드용 전원 공급 장치 失效
    IC卡用电源单元及其控制方法

    公开(公告)号:KR1020030009597A

    公开(公告)日:2003-02-05

    申请号:KR1020010044113

    申请日:2001-07-23

    Abstract: PURPOSE: A power supply unit for an IC card and a method for controlling the same are provided to minimize an electric power consumption necessary for driving a system and perform a stable operation in an IC card system having an internal power source(battery). CONSTITUTION: An internal power source(110) supplies a power source of a predetermined level in the case that an internal circuit unit(200) of a card system is an operation mode or a waiting mode. A switching control circuit unit(120) receives a mode judgement signal from a mode judgement unit in the internal circuit unit(200) which judges whether the card system is an operation mode or a waiting mode, and supplies a switching control signal to the first switching unit(140) and the second switching unit(141) in accordance with the received mode judgement signal, respectively. That is, in the case that the card system is an operation mode, the switching control circuit unit(120) supplies a switching control signal to the first switching unit(140) for making the internal power source(110) be supplied to the internal circuit unit(200) and making the internal power source(110) be accumulated in an electric charge accumulating circuit unit(130). Also, the switching control circuit unit(120) supplies a switching control signal to the second switching unit(141) for making an electric charge be accumulated in an electric charge accumulating circuit unit(130).

    Abstract translation: 目的:提供用于IC卡的电源单元及其控制方法,以最小化驱动系统所需的电力消耗并在具有内部电源(电池)的IC卡系统中执行稳定的操作。 构成:在卡系统的内部电路单元(200)是操作模式或等待模式的情况下,内部电源(110)提供预定电平的电源。 开关控制电路单元(120)从内部电路单元(200)中的模式判断单元接收模式判断信号,判定卡系统是操作模式还是等待模式,并将切换控制信号提供给第一 切换单元(140)和第二切换单元(141)。 也就是说,在卡系统是操作模式的情况下,切换控制电路单元(120)向第一切换单元(140)提供切换控制信号,以使内部电源(110)提供给内部 电路单元(200),并且使内部电源(110)累积在电荷累积电路单元(130)中。 此外,切换控制电路单元(120)向第二切换单元(141)提供切换控制信号,以在电荷累积电路单元(130)中累积电荷。

    암호프로세서 패키지에서의 물리적인 해킹방지 장치
    178.
    发明公开
    암호프로세서 패키지에서의 물리적인 해킹방지 장치 失效
    用于防止密码处理器包中的物理黑客的装置

    公开(公告)号:KR1020010057804A

    公开(公告)日:2001-07-05

    申请号:KR1019990061214

    申请日:1999-12-23

    Abstract: PURPOSE: An apparatus for preventing a physical hacking in a password processor package is provided to reduce the power consumption by accurately discriminating a natural change and a physical hacking attempt, thereby amplifying and sensing the physical hacking attempt. CONSTITUTION: A physical hacking prevention device is composed of an upper and a lower part metal plate(11,13) which senses a physical hacking attempt, a conductive material(12) which connects the metal plates(11,13), a constant current source(15), a current sensing unit(16) which senses a change of an electric field and a current and a conducting wire(14). The constant current source(16) is composed of small batteries in a password processor package. In case that a physical hacking attempt is performed from the outside, a relative position of the upper part metal plate(11) and the lower part metal plate(13) can be changed. Therefore, the current sensing unit(16) senses the change.

    Abstract translation: 目的:提供一种用于防止密码处理器封装中的物理黑客的装置,以通过精确地区分自然变化和物理黑客尝试来减少功耗,从而放大和感测物理黑客尝试。 构成:物理黑客预防装置由感测物理黑客企图的上部和下部金属板(11,13),连接金属板(11,13)的导电材料(12),恒定电流 源极(15),感测电场变化的电流感测单元(16)和电流(14)。 恒流源(16)由密码处理器封装中的小电池组成。 在从外部进行物理黑客尝试的情况下,可以改变上部金属板(11)和下部金属板(13)的相对位置。 因此,电流感测单元(16)感测到变化。

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