公开(公告)号：WO2008010007A1

公开(公告)日：2008-01-24

申请号：PCT/IB2006/002032

申请日：2006-07-19

Applicant: STMICROELECTRONICS S.R.L. ,  CONVERTINO, Gabriella ,  PARATA, Carlo ,  SCARPA, Vincenzo

Inventor： CONVERTINO, Gabriella ,  PARATA, Carlo ,  SCARPA, Vincenzo

IPC: H04L12/28

CPC classification number: H04W76/043 ,  H04W72/04 ,  H04W76/11 ,  H04W76/15 ,  H04W76/23 ,  H04W84/12

Abstract: A wireless communication network, such as a IEEE 802.11 WLAN, includes an access point (AP) and a plurality of stations (STAl, STA2). The Access Point (AP) sends towards the stations (STAl, STA2) periodic information arranged in time frames or beacon intervals. The stations (STAl, STA2) in the network are configured to communicate: - in a first mode, called Infrastructure Mode (IM), through the access point (AP), and - in a second mode, called Direct Link Mode (DLM), directly with each other. The time frames are partitioned into: - a first time interval (IM_SI) wherein the stations (STAl, STA2) communicate in the first mode over a first channel; - a second time interval (DLM_SI) wherein the stations (STAl, STA2) communicate in the second mode over a second channel/ and - a third time interval (MIXED_SI) wherein the stations (STAl, STA2) communicate in either of the first (IM) or the second (DLM) mode.

Abstract translation: 诸如IEEE 802.11 WLAN的无线通信网络包括接入点（AP）和多个站（STA1，STA2）。 接入点（AP）向站点（STA1，STA2）发送以时间帧或信标间隔排列的周期性信息。 网络中的站（STA1，STA2）被配置为通信： - 在第一模式中，通过接入点（AP）称为基础设施模式（IM），以及 - 在称为直接链路模式（DLM）的第二模式中， ，直接对方。 时间帧被划分为： - 第一时间间隔（IM_SI），其中站（STA1，STA2）通过第一信道以第一模式通信; - 第二时间间隔（DLM_SI），其中站（STA1，STA2）在第二模式中通过第二信道/和第三时间间隔（MIXED_SI）进行通信，其中站（STA1，STA2）在第一（ IM）或第二（DLM）模式。

公开(公告)号：WO2007148354A1

公开(公告)日：2007-12-27

申请号：PCT/IT2006/000476

申请日：2006-06-21

Applicant: STMICROELECTRONICS S.R.L. ,  ADRAGNA, Claudio ,  GATTAVARI, Giuseppe

Inventor： ADRAGNA, Claudio ,  GATTAVARI, Giuseppe

IPC: H02J1/10 ,  H02M3/158

CPC classification number: H02M3/1584 ,  H02J1/102 ,  H02M2001/0048 ,  Y02B70/1491 ,  Y10T307/406 ,  Y10T307/555 ,  Y10T307/707

Abstract: A control device of a plurality of switching converters (Convl.ConvN) is disclosed; each converter comprises at least one power switch and is associated with a control circuit (Mod1 ...ModN) of the at least one power switch. The control device comprises means (100) suitable for comparing a signal (CTRL) representative of the load of the plurality of converters (ConvL.ConvN) with a plurality of reference signals (Vref1 ...Vref(N-l)) and suitable for enabling or disabling at least one of said plurality of control circuits (Mod1...ModN) in response to said comparison.

Abstract translation: 公开了多个开关转换器（Convl.ConvN）的控制装置; 每个转换器包括至少一个电源开关并与所述至少一个电源开关的控制电路（Mod1 ... ModN）相关联。 控制装置包括适于将表示多个转换器（ConvL.ConvN）的负载的信号（CTRL）与多个参考信号（Vref1 ... Vref（N1））进行比较并且适合于使能的装置（100） 或者响应于所述比较而禁用所述多个控制电路（Mod1 ... ModN）中的至少一个。

公开(公告)号：WO2007135694A1

公开(公告)日：2007-11-29

申请号：PCT/IT2006/000372

申请日：2006-05-18

Applicant: STMICROELECTRONICS S.R.L. ,  RONSISVALLE, Cesare ,  ENEA, Vincenzo

Inventor： RONSISVALLE, Cesare ,  ENEA, Vincenzo

IPC: H01L29/745 ,  H01L29/749 ,  H01L29/74

CPC classification number: H01L29/7395 ,  H01L29/742 ,  H01L29/7455

Abstract: Described herein is a power device (10) having a first current-conduction terminal (A) , a second current-conduction terminal (K) , a control terminal (G) receiving, in use, a control voltage (VGATE) of the power device (10), and a thyristor device (12) and a first insulated-gate switch device (14) connected in series between the first and the second conduction terminals; the first insulated-gate switch device (14) has a gate terminal connected to the control terminal (G), and the thyristor device (12) has a base terminal (16) . The power device (10) is further provided with: a second insulated-gate switch device (18), connected between the first current-conduction terminal (A) and the base terminal (16) of the thyristor device (12) , and having a respective gate terminal connected to the control terminal (G) ; and a Zener diode (19) , connected between the base terminal (16) of the thyristor device (12) and the second current-conduction terminal (K) so as to enable extraction of current from the base terminal (16) in a given operating condition.

Abstract translation: 这里描述的是具有第一通电端子（A），第二通电端子（K），控制端子（G）的功率器件（10），其在使用中接收功率的控制电压（VGATE） 装置（10）和串联连接在第一和第二导电端子之间的晶闸管装置（12）和第一绝缘栅极开关装置（14） 第一绝缘栅极开关装置（14）具有连接到控制端子（G）的栅极端子，并且晶闸管装置（12）具有基极端子（16）。 功率器件（10）还具有连接在晶闸管器件（12）的第一通电端子（A）和基极端子（16）之间的第二绝缘栅极开关器件（18），并具有 连接到所述控制端子（G）的相应的栅极端子; 和连接在晶闸管器件（12）的基极端子（16）和第二通电端子（K）之间的齐纳二极管（19），以便能够在给定的基极端子（16）中提取电流 操作条件。

公开(公告)号：WO2007116420A1

公开(公告)日：2007-10-18

申请号：PCT/IT2006/000244

申请日：2006-04-11

Applicant: STMICROELECTRONICS S.R.L. ,  LORENTI, Simona ,  CAMALLERI, Cateno Marco ,  SAGGIO, Mario, Giuseppe ,  FRISINA, Ferruccio

Inventor： LORENTI, Simona ,  CAMALLERI, Cateno Marco ,  SAGGIO, Mario, Giuseppe ,  FRISINA, Ferruccio

IPC: H01L29/06 ,  H01L29/78 ,  H01L21/336 ,  H01L21/20 ,  H01L21/205 ,  H01L21/324 ,  H01L21/3065 ,  H01L21/306 ,  H01L29/10 ,  H01L29/739 ,  H01L29/732

CPC classification number: H01L21/3247 ,  H01L21/02057 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/3065 ,  H01L21/324 ,  H01L27/088 ,  H01L29/045 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/73 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/8611 ,  H01L29/872

Abstract: Process for manufacturing a semiconductor power device, wherein a trench (8) is formed in a semiconductor body (2) having a first conductivity type; the trench is annealed for shaping purpose (8a) ; and the trench (8a) is filled with semiconductor material via epitaxial growth so as to obtain a first column (9) having a second conductivity type. The epitaxial growth is performed by supplying a gas containing silicon and a gas containing dopant ions of the second conductivity type in presence of a halogenide gas and occurs with uniform distribution of the dopant ions. The flow of the gas containing dopant ions is varied according to a linear ramp during the epitaxial growth; in particular, in the case of selective growth of the semiconductor material in the presence of a hard mask, the flow decreases; in the case of non-selective growth, in the absence of hard mask, the flow increases .

Abstract translation: 一种制造半导体功率器件的方法，其中在具有第一导电类型的半导体本体（2）中形成沟槽（8） 沟槽退火成型目的（8a）; 并且沟槽（8a）通过外延生长填充半导体材料，从而获得具有第二导电类型的第一列（9）。 外延生长通过在卤化物气体的存在下供给包含硅和含有第二导电类型的掺杂剂离子的气体进行，并且以掺杂剂离子的均匀分布发生。 含气体掺杂剂离子的流动在外延生长期间根据线性斜坡而变化; 特别是在硬掩模存在下选择性地生长半导体材料的情况下，流量减少; 在非选择性生长的情况下，在没有硬掩模的情况下，流动增加。

公开(公告)号：WO2007096913A1

公开(公告)日：2007-08-30

申请号：PCT/IT2006/000104

申请日：2006-02-24

Applicant: STMICROELECTRONICS S.R.L. ,  DALLAVALLE, Carlo ,  CONIGLIARO, Salvatore

Inventor： DALLAVALLE, Carlo ,  CONIGLIARO, Salvatore

IPC: G06F17/50

CPC classification number: G06F17/5045 ,  H01L27/11803

Abstract: The present invention relates to a method for designing a complex circuit architecture (1) including a plurality of circuit portions interconnected one to the other in said architecture, each circuit portions including a VLSI number of on-board transistors of both NMOS and PMOS type and wherein a circuit architecture core (2) is associated to at least a couple of body bias generators (3), one for said NMOS and one for said PMOS transistors; characterized by the following steps: - providing said circuit architecture core by a library of basic transistor cells having N and P MOS substrates separated from their corresponding source terminals; - monitoring the active current (Ion) in said transistors; - comparing the monitored current with a predetermined current value corresponding to standard or typical working conditions of said transistors according to the result of the comparison phase providing a reverse bias for those cells of the circuit architecture core to be compensated because of a possible excess of current leakage.

Abstract translation: 本发明涉及一种用于设计包括在所述架构中彼此相互互连的多个电路部分的复合电路架构（1）的方法，每个电路部分包括VLSI数量的NMOS和PMOS型的板上晶体管，以及 其中电路架构核心（2）与至少一对主体偏置发生器（3）相关联，一个用于所述NMOS，一个用于所述PMOS晶体管; 其特征在于以下步骤： - 通过具有从其对应的源极端子分离的N和P MOS衬底的基本晶体管单元库提供所述电路架构内核; - 监测所述晶体管中的有功电流（Ion）; - 根据比较结果的结果，将所监视的电流与对应于所述晶体管的标准或典型工作条件的预定电流值进行比较，为由于可能的过电流而补偿的要补偿的电路架构核心的那些单元提供反向偏置 泄漏。

公开(公告)号：WO2007031569A2

公开(公告)日：2007-03-22

申请号：PCT/EP2006/066387

申请日：2006-09-14

Applicant: STMICROELECTRONICS S.R.L. ,  PASOLINI, Fabio ,  FONTANELLA, Luca

Inventor： PASOLINI, Fabio ,  FONTANELLA, Luca

IPC: H04N5/232

CPC classification number: G01P15/125 ,  G01P15/18 ,  G01P2015/082 ,  G01P2015/0831 ,  H04N5/23248 ,  H04N5/23258 ,  H04N5/23287

Abstract: A device for stabilizing images acquired by a digital-image sensor (5) includes a motion- sensing device (15, 16, 17, 18), for detecting quantities (P, Y, Y) correlated to pitch and yaw movements of the digital-image sensor (5), and a processing unit (14), connectable to the 5 digital-image sensor (5) for receiving a first image signal (IMG) and configured for extracting a second image signal (IMG') from the first image signal (IMG) on the basis of the quantities (P, Y, Y) detected by the motion-sensing device (15, 16, 17, 18). The motion-sensing device (15, 16, 17, 18) includes a first accelerometer (15) and a second accelerometer (16).

Abstract translation: 用于稳定由数字图像传感器（5）获取的图像的装置包括运动感测装置（15,16,17,18），用于检测与数字图像传感器（5）的俯仰和偏航运动相关的数量（P，Y，Y） 图像传感器（5）和可连接到5数字图像传感器（5）的处理单元（14），用于接收第一图像信号（IMG），并被配置为从第一图像传感器提取第二图像信号（IMG'） 基于由运动感测装置（15,16,17,18）检测到的量（P，Y，Y）的图像信号（IMG）。 运动感测装置（15,16,17,18）包括第一加速度计（15）和第二加速度计（16）。

公开(公告)号：WO2007006504A3

公开(公告)日：2007-01-18

申请号：PCT/EP2006/006672

申请日：2006-07-07

Applicant: STMICROELECTRONICS S.R.L. ,  FRISINA, Ferruccio ,  SAGGIO, Mario, Giuseppe ,  MAGRI', Angelo

Inventor： FRISINA, Ferruccio ,  SAGGIO, Mario, Giuseppe ,  MAGRI', Angelo

IPC: H01L29/78 ,  H01L29/10 ,  H01L21/336 ,  H01L29/423

Abstract: Method for manufacturing electronic devices on a semiconductor substrate (1, 1a; 10, 11) with wide band gap comprising the steps of: forming a screening structure (3a, 20) on said semiconductor substrate (1, 1a; 10, 11) comprising at least a dielectric layer (2, 20) which leaves a plurality of areas of said semiconductor substrate (1, 1a; 10, 11) exposed, carrying out at least a ion implantation of a first type of dopant in said semiconductor substrate (1, 1a; 10, 11) to form at least a first implanted region (4, 40), carrying out at least a ion implantation of a second type of dopant in said semiconductor substrate (1, 1a; 10, 11) to form at least a second implanted region (6, 6c; 60, 61) inside said at least a first implanted region (4, 40), carrying out an activation thermal process of the first type and second type of dopant with low thermal budget suitable to complete said formation of said at least first and second implanted regions (4, 40; 6, 60).

公开(公告)号：WO2006114376A1

公开(公告)日：2006-11-02

申请号：PCT/EP2006/061664

申请日：2006-04-19

Applicant: STMICROELECTRONICS S.R.L. ,  CURRO', Giuseppe

Inventor： CURRO', Giuseppe

IPC: H01L21/336 ,  H01L29/78 ,  H01L29/08

CPC classification number: H01L29/7802 ,  H01L29/0878 ,  H01L29/42376 ,  H01L29/4238 ,  H01L29/66719

Abstract: In a process for manufacturing a MOS device: forming a semiconductor layer (23) having a first type of conductivity; forming an insulated gate structure (27) having an electrode region (25), above the semiconductor layer (23); forming body regions (37) having a second type of conductivity, within the semiconductor layer (23), laterally and partially underneath the insulated gate structure (27); forming source regions (38) having the first type of conductivity, within the body regions (37); and forming a first enrichment region (42), in a surface portion of the semiconductor layer (23) underneath the insulated gate structure (27), the first enrichment region (42) having the first type of conductivity and being set at a distance from 10 the body regions (37). In order to form the first enrichment region (42), a first enrichment window (30) is defined within the insulated gate structure (27), and first dopant species of the first type of conductivity are introduced through the first enrichment window (30) and in a way self-aligned thereto.

Abstract translation: 在制造MOS器件的工艺中：形成具有第一类导电性的半导体层（23）; 在所述半导体层（23）的上方形成具有电极区域（25）的绝缘栅极结构（27）。 在所述半导体层（23）内形成具有第二导电类型的主体区域（37），在所述绝缘栅极结构（27）的横向和部分下方。 在体区（37）内形成具有第一类导电性的源区（38）; 以及在所述绝缘栅极结构（27）下方的所述半导体层（23）的表面部分中形成第一富集区域（42），所述第一富集区域（42）具有所述第一类型的导电性并且被设置为距离 10身体区域（37）。 为了形成第一富集区域（42），在绝缘栅极结构（27）内限定第一富集窗口（30），并且通过第一富集窗口（30）引入第一类型的导电性的第一掺杂物质， 并以其自身对准的方式。

公开(公告)号：WO2006109105A1

公开(公告)日：2006-10-19

申请号：PCT/IB2005/000966

申请日：2005-04-12

Applicant: STMICROELECTRONICS S.R.L. ,  VILEI, Antonio ,  CONVERTINO, Gabriella

Inventor： VILEI, Antonio ,  CONVERTINO, Gabriella

IPC: H04L1/18 ,  H04L1/16 ,  H04L12/28

CPC classification number: H04L1/18 ,  H04L1/16 ,  H04L2001/0093 ,  H04W24/00

Abstract: Transmission of multicast packets over a local area network (30, 40, 50) is controlled by: - identifying the condition where only a single receiver (40, 50) exists within the local area network (30, 40, 50) for a given multicast group of packets, and - allowing, upon occurrence of that condition, Automatic Repeat Request (ARQ) of the packets multicast towards said single receiver (40, 50). A preferred field of application is wireless local area networks for use in a home environment.

Abstract translation: 通过以下方式来控制组播分组的传输：（a）识别在给定的局域网（30,40,50）内只有单个接收机（40,50）存在于局域网（30,40,50）内的状态 组播组，以及 - 在发生所述条件时允许所述分组的自动重传请求（ARQ）向所述单个接收机（40,50）组播。 优选的应用领域是在家庭环境中使用的无线局域网。

公开(公告)号：WO2006089860A1

公开(公告)日：2006-08-31

申请号：PCT/EP2006/060047

申请日：2006-02-17

Applicant: STMicroelectronics s.r.l. ,  VIGAR, Adrian ,  CAUCHI, Carmel

Inventor： VIGAR, Adrian ,  CAUCHI, Carmel

IPC: H01L21/00

CPC classification number: H01L21/67092 ,  B29C45/14639 ,  H01L21/67126

Abstract: An apparatus for removing or decreasing the resin flush from the top of the metallic part of a semiconductor device is described, comprising a main reservoir and nozzles for sprinkling a solution with abrasive material suspended therein onto a semiconductor device placed in said main reservoir. Said apparatus also comprises a pressure sensor placed at the bottom of said main reservoir, a liquid level sensor associated with said main reservoir and a control unit for feeding said solution to said nozzles according to the pressure and level raised by said sensors.

Abstract translation: 描述了一种用于从半导体器件的金属部分的顶部冲洗或减少树脂的装置，其包括主容器和用于将悬浮在其中的研磨材料的溶液喷洒到放置在所述主容器中的半导体器件上的喷嘴。 所述装置还包括位于所述主容器底部的压力传感器，与所述主容器相关联的液位传感器和用于根据由所述传感器提升的压力和水平将所述溶液供给到所述喷嘴的控制单元。