公开(公告)号：EP0985266B1

公开(公告)日：2001-12-19

申请号：EP99912935.6

申请日：1999-03-24

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： BRUWER, Frederick ,  SMIT, Willem

IPC: H03B5/20

CPC classification number: H03B5/20 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  Y10T307/826

Abstract: A transmitter system comprises an oscillator and having an adjustable monolithic capacitor circuit used for frequency stabilization. The oscillator signal is modulated and transmitted. A data generating chip is coupled to the transmitter. The data generating chip is used for adjusting and controlling the transmitter oscillator frequency signal. The adjustable capacitor circuit is located internal to the data generating chip and is coupled to a ground pin and one of a plurality of function pins on the data generating chip. The adjustable capacitor circuit is used for adjusting and setting the centerpoint of the transmitter oscillator frequency signal.

公开(公告)号：EP0985266A1

公开(公告)日：2000-03-15

申请号：EP99912935.6

申请日：1999-03-24

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： BRUWER, Frederick ,  SMIT, Willem

IPC: H03B5/20

CPC classification number: H03B5/20 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  Y10T307/826

Abstract: A transmitter system comprises an oscillator and having an adjustable monolithic capacitor circuit used for frequency stabilization. The oscillator signal is modulated and transmitted. A data generating chip is coupled to the transmitter. The data generating chip is used for adjusting and controlling the transmitter oscillator frequency signal. The adjustable capacitor circuit is located internal to the data generating chip and is coupled to a ground pin and one of a plurality of function pins on the data generating chip. The adjustable capacitor circuit is used for adjusting and setting the centerpoint of the transmitter oscillator frequency signal.

公开(公告)号：EP0940908A2

公开(公告)日：1999-09-08

申请号：EP99100957.2

申请日：1999-01-20

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yamamoto, Takeshi c/o Toshiba K.K. Intel.Prop.Div.

IPC: H03B5/20

CPC classification number: H03B5/24 ,  H03B2201/02

Abstract: According to the present invention, while maintaining a constant ratio between a bias current supplied to field effect transistors of transconductors 4, 5 and a bias current supplied to field effect transistors of amplifier 3, by controlling oscillation frequency through adjustment of values of bias currents, frequency control can be carried out in much wider range.

Abstract translation: 根据本发明，通过提供给跨导体4,5的场效应晶体管的偏置电流和提供给放大器3的场效应晶体管的偏置电流保持恒定的比率，通过调整偏置电流的值来控制振荡频率， 频率控制可以在更宽的范围内进行。

公开(公告)号：EP0695480B1

公开(公告)日：1997-08-13

申请号：EP94923867.9

申请日：1994-04-19

Applicant: RCA THOMSON LICENSING CORPORATION

Inventor： SAUER, Donald, Jon ,  RODDA, William ,  CAMPBELL, Edward, Richard, III

IPC: H03L7/113

CPC classification number: H03B5/24 ,  H03B5/20 ,  H03B2200/0038 ,  H03B2200/005 ,  H03B2200/0058 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/0991 ,  H03L7/113 ,  H03L7/14 ,  H04N5/126 ,  H04N7/122

Abstract: A frequency detector of a phase-lock-loop circuit is used for measuring a frequency error between a frequency of an output signal of an oscillator and a frequency of a synchronizing signal. When the frequency error in each of 32 periods of the synchronizing signal exceeds a predetermined magnitude, the phase-lock-loop circuits begins operating in a coarse frequency correction mode. As long as the 32 periods have not lapsed, the phase-lock-loop circuit operates in an idle mode of operation and the oscillator is not corrected. As a result, during vertical retrace, when equalizing pulses occur, the phase-lock-loop circuit is not disturbed by a large frequency error.

公开(公告)号：EP0787382A1

公开(公告)日：1997-08-06

申请号：EP95931115.0

申请日：1995-09-20

Applicant: NORTHERN TELECOM LIMITED

Inventor： BROWN, Anthony, Kevin, Dale

IPC: H03B5 ,  H03F3 ,  H03B1 ,  H03B27

CPC classification number: H03B5/20 ,  H03B5/24 ,  H03B27/00 ,  H03B2200/0058 ,  H03B2200/0062 ,  H03B2200/0078 ,  H03B2201/02 ,  H03F3/45479

Abstract: A low noise linear amplifier and a microwave voltage controlled oscillator constructed from such amplifier. Each amplifier within the VCO utilizes a ratioed transistor configuration to generate a linear output over a wide range of inputs. Output current from the amplifier is split into a main output current and components of in-phase and 180° out-of-phase current. A logarithmic tuning control combines the components of in-phase and 180° out-of-phase currents in inverse ratio to provide a constant d.c. feedback current.

Abstract translation: 低噪声线性放大器和由这种放大器构成的微波压控振荡器。 VCO内的每个放大器均采用比例晶体管配置，以在各种输入范围内生成线性输出。 放大器的输出电流分为主输出电流和同相和180°异相电流分量。 对数调谐控制将反相比例的同相和180°异相电流分量相结合，以提供恒定的直流电压。 反馈电流。

公开(公告)号：EP0695480A1

公开(公告)日：1996-02-07

申请号：EP94923867.0

申请日：1994-04-19

Applicant: RCA THOMSON LICENSING CORPORATION

Inventor： SAUER, Donald, Jon ,  RODDA, William ,  CAMPBELL, Edward, Richard, III

IPC: H03L7 ,  H03B5 ,  H03K3 ,  H04N5 ,  H04N7 ,  H03B1

CPC classification number: H03B5/24 ,  H03B5/20 ,  H03B2200/0038 ,  H03B2200/005 ,  H03B2200/0058 ,  H03B2201/02 ,  H03B2201/025 ,  H03B2201/0266 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/0991 ,  H03L7/113 ,  H03L7/14 ,  H04N5/126 ,  H04N7/122

Abstract: A frequency detector of a phase-lock-loop circuit is used for measuring a frequency error between a frequency of an output signal of an oscillator and a frequency of a synchronizing signal. When the frequency error in each of 32 periods of the synchronizing signal exceeds a predetermined magnitude, the phase-lock-loop circuits begins operating in a coarse frequency correction mode. As long as the 32 periods have not lapsed, the phase-lock-loop circuit operates in an idle mode of operation and the oscillator is not corrected. As a result, during vertical retrace, when equalizing pulses occur, the phase-lock-loop circuit is not disturbed by a large frequency error.

公开(公告)号：EP0523854A3

公开(公告)日：1993-07-28

申请号：EP92305478.7

申请日：1992-06-15

Applicant: SGS-Thomson Microelectronics Limited

Inventor： Cytera, Christopher ,  Hall, Andrew Medlicott

IPC: H03L7/099 ,  H03B5/24

CPC classification number: H03L7/0995 ,  H03B5/24 ,  H03B27/00 ,  H03B2200/0038 ,  H03B2200/0058 ,  H03B2200/0062 ,  H03B2200/0078 ,  H03B2201/02 ,  H03L1/00

Abstract: The oscillator comprises a plurality of differential amplication stages (10,12,14,16) each arranged to introduce a phase shift between its differential input signal and its differential output signal such that the total phase shift introduced by the stages is 360 o . In this way an oscillating signal is produced at the output of each stage. Because each stage receives and supplies difference signals, any changes in the power supply of the stages affect both inputs or outputs in the same way so that the effect on the differential signal is minimal. The circuit thus provides a reduction of the effect of power supply noise. The oscillator may be used for instance in a N-PLL-circuit.

公开(公告)号：EP0523854A2

公开(公告)日：1993-01-20

申请号：EP92305478.7

申请日：1992-06-15

Applicant: SGS-Thomson Microelectronics Limited

Inventor： Cytera, Christopher ,  Hall, Andrew Medlicott

IPC: H03L7/099 ,  H03B5/24

CPC classification number: H03L7/0995 ,  H03B5/24 ,  H03B27/00 ,  H03B2200/0038 ,  H03B2200/0058 ,  H03B2200/0062 ,  H03B2200/0078 ,  H03B2201/02 ,  H03L1/00

Abstract: The oscillator comprises a plurality of differential amplication stages (10,12,14,16) each arranged to introduce a phase shift between its differential input signal and its differential output signal such that the total phase shift introduced by the stages is 360 o . In this way an oscillating signal is produced at the output of each stage. Because each stage receives and supplies difference signals, any changes in the power supply of the stages affect both inputs or outputs in the same way so that the effect on the differential signal is minimal. The circuit thus provides a reduction of the effect of power supply noise. The oscillator may be used for instance in a N-PLL-circuit.

Abstract translation: 压控振荡器包括多个差分放大级（10,12,14,16），每个差分放大级被布置成在其差分输入信号与其差分输出信号之间引入相移，使得由级引入的总相位为360°， O>。 以这种方式，在每个级的输出处产生振荡信号。

公开(公告)号：EP0495206A2

公开(公告)日：1992-07-22

申请号：EP91121332.0

申请日：1991-12-12

Applicant: Hughes Aircraft Company

Inventor： Wen, Cheng P. ,  Mendolia, Gregory S. ,  Siracusa, Mario ,  Maieron, Joseph J. ,  Higdon, William D.

IPC: H01P3/00 ,  H03B5/18

CPC classification number: H03B5/1852 ,  H03B2200/0086 ,  H03B2201/011 ,  H03B2201/014 ,  H03B2201/02 ,  Y10T29/49004

Abstract: A coplanar waveguide based microwave monolithic integrated circuit (MMIC) oscillator chip (14) has an active oscillator element (16) and a resonant capacitor (18) formed thereon and is flip-chip mounted on a dielectric substrate (12). A resonant inductor (22) is formed on the substrate (12) and interconnected with the resonant capacitor (18) to form a high Q-factor resonant circuit for the oscillator (10). The resonant inductor (22) includes a shorted coplanar waveguide section (24) consisting of first and second ground strips (24b, 24c), and a conductor strip (24a) extending between the first and second ground strips (24b, 24c) in parallel relation thereto and being separated therefrom by first and second spaces (26a, 26b), respectively. A shorting strip (24d) electrically interconnects adjacent ends of the conductor strip (24a) and first and second ground strips (24b, 24c), respectively. A dielectric film (34) may be formed over at least adjacent portions of the conductor strip (24a) and first and second ground strips (24b, 24c). The resonant inductor (22) is adjusted to provide a predetermined resonant frequency for the oscillator (10) by using a laser to remove part of the dielectric film (34) in the first and second spaces (26a, 26b) for fine adjustment, and/or to remove part of the shorting strip (24d) at the ends of the first and second spaces (26a, 26b) for coarse adjustment.

Abstract translation: 基于共面波导的微波单片集成电路（MMIC）振荡器芯片（14）具有形成在其上的有源振荡器元件（16）和谐振电容器（18），并被倒装安装在电介质基片（12）上。 谐振电感器（22）形成在衬底（12）上并与谐振电容器（18）互连，以形成振荡器（10）的高Q因子谐振电路。 谐振电感器（22）包括由第一和第二接地条（24b，24c）组成的短路共面波导部分（24）和在第一和第二接地条（24b，24c）之间平行延伸的导体条（24a） 分别与第一和第二空间（26a，26b）分离。 短路条（24d）分别将导体条（24a）的相邻端和第一和第二接地条（24b，24c）互连。 绝缘膜（34）可以形成在导体条（24a）和第一和第二接地条（24b，24c）的至少相邻部分上。 谐振电感器（22）被调节以通过使用激光去除第一和第二空间（26a，26b）中的电介质膜（34）的一部分用于微调的振荡器（10）的预定谐振频率，以及 /或去除用于粗调的第一和第二空间（26a，26b）的端部处的部分短路条（24d）。

公开(公告)号：EP0340846A1

公开(公告)日：1989-11-08

申请号：EP89201075.2

申请日：1989-04-26

Applicant: Philips Electronics N.V.

Inventor： Stuivenwold, Armand Michael ,  van Lammeren, Johannes Petrus Maria ,  van Elk, Henricus Theodorus Petrus ,  Motté, Bruno Pierre Jean-Marie

IPC: H03D3/02 ,  H03L7/14

CPC classification number: H03D3/241 ,  H03B2200/0036 ,  H03B2200/0038 ,  H03B2201/02 ,  H03D3/001 ,  H03D13/008

Abstract: Self-adjusting frequency demodulation circuit comprising a frequency demodulator (13) which is designed as an integrated circuit, the adjustment being effected with the aid of a calibration signal source (7) of one single frequency and a measuring circuit (113, 35, 101) coupled to an output (113) of the frequency demodulator (13) by controlling the output signal amplitude of the frequency demodulation circuit with a multiplier (21) which is controllable by the measuring circuit and forms part of a tuning correction circuit which optionally may further include a level shifting circuit (57). The frequency demodulation circuit is particularly suitable for use in a SECAM color television receiver, only one frequency demodulator then being required for demodulating both the two color difference signals and the identification signal.

Abstract translation: 自适应频率解调电路，包括设计为集成电路的频率解调器（13），借助于单个频率的校准信号源（7）和测量电路（113,35,101 ）通过利用可由测量电路控制的乘法器（21）控制频率解调电路的输出信号振幅，并且构成调谐校正电路的一部分，任选地可以耦合到频率解调器（13）的输出端（113） 还包括电平移位电路（57）。 频率解调电路特别适用于SECAM彩色电视接收机，然后仅需要一个频率解调器来解调两个色差信号和识别信号。