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公开(公告)号：JP2017517901A
公开(公告)日：2017-06-29
申请号：JP2017511150
申请日：2015-04-28
Inventor： アリベール，フレデリク , モラン，ピエール
IPC: H01L21/8234 , H01L21/336 , H01L21/8238 , H01L27/08 , H01L27/088 , H01L27/092 , H01L29/786
CPC classification number: H01L29/66795 , H01L21/02532 , H01L21/02614 , H01L21/02694 , H01L21/823821 , H01L21/845 , H01L29/205
Abstract: 半導体構造を製造する方法は、異なる応力/歪み状態を有するフィンFETトランジスタ用のフィンの形成を含む。1つの応力/歪み状態のフィンが、n型フィンFETを形成するために採用されることがあり、一方でもう1つの応力/歪み状態のフィンが、p型フィンFETを形成するために採用されることがある。異なる応力/歪み状態を有するフィンは、半導体材料の共通層から形成されることがある。半導体構造および半導体デバイスは、このような方法を使用して製造される。
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公开(公告)号：JP2014116307A
公开(公告)日：2014-06-26
申请号：JP2013249831
申请日：2013-12-03
Inventor： THOMAS STAMM
CPC classification number: H02M3/33515 , H02M1/42 , H02M7/217 , H05B33/0815 , Y02B20/347
Abstract: PROBLEM TO BE SOLVED: To provide an improved LED drive circuit and method for illumination.SOLUTION: A fly-back type switched current regulator includes a primary transformer winding coupled to receive a rectified DC signal derived from an AC signal. A drain of a power transistor is coupled to the primary winding, and a source of the power transistor is coupled to an input of a comparison circuit and a primary transformer winding sense resistor. A control terminal of the power transistor is coupled to an output of the comparison circuit. A capacitor stores a variable reference signal for application at a first capacitor terminal to another input of the differential circuit. The variable reference signal is compared with a winding current signal generated by the sense resistor by the comparison circuit. An injection circuit applies an AC signal derived from the rectified DC signal to a second terminal of the capacitor so as to modulate the stored variable reference signal. The regulator is coupled to drive LEDs.
Abstract translation: 要解决的问题：提供改进的LED驱动电路和照明方法。解决方案：回扫式开关电流调节器包括耦合以接收从AC信号导出的整流DC信号的初级变压器绕组。 功率晶体管的漏极耦合到初级绕组，并且功率晶体管的源极耦合到比较电路和初级变压器绕组检测电阻器的输入端。 功率晶体管的控制端耦合到比较电路的输出端。 电容器存储用于在第一电容器端子处施加到差分电路的另一输入端的可变参考信号。 可变参考信号与由比较电路由检测电阻器产生的绕组电流信号进行比较。 注入电路将从整流后的直流信号得到的交流信号施加到电容器的第二端，以便调制存储的可变参考信号。 调节器耦合到驱动LED。
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公开(公告)号：JP2014087056A
公开(公告)日：2014-05-12
申请号：JP2013211156
申请日：2013-10-08
Inventor： OLEG LOGVINOV
IPC: H04B3/54
CPC classification number: H04B3/54 , H03K2217/00 , H03K2217/0009 , H03K2217/0036 , H04W8/00 , H04W52/00 , H04W88/18 , H04W92/00 , H05B37/0263
Abstract: PROBLEM TO BE SOLVED: To provide improved system and method for a power line modem.SOLUTION: In accordance with one embodiment, a method of operating an electronic system includes: detecting an incoming transmission on a power line; and correcting a switching action of a switching mode power supply bonded with the power line when the incoming transmission is detected. The correcting reduces level of interference generated by the switching mode power supply.
Abstract translation: 要解决的问题：为电力线调制解调器提供改进的系统和方法。解决方案：根据一个实施例，一种操作电子系统的方法包括：检测电力线上的输入传输; 以及当检测到进入的传输时，校正与电力线路接合的开关模式电源的切换动作。 校正减少了由开关模式电源产生的干扰水平。
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公开(公告)号：JP2014072526A
公开(公告)日：2014-04-21
申请号：JP2013197609
申请日：2013-09-24
Applicant: St Microelectron Inc , エスティーマイクロエレクトロニクス,インコーポレイテッドSTMicroelectronics, Inc. , Internatl Business Machines Corp , インターナショナル ビジネス マシーンズ コーポレイションInternational Business Machines Corporation
Inventor： ZHANG JOHN H , CLEVENGER LAWRENCE A , CARL RADENS , YIHENG XU
IPC: H01L21/768 , H01L23/522
CPC classification number: H01L21/76816 , H01L21/76807 , H01L21/76831 , H01L21/76834 , H01L21/76838 , H01L21/76897 , H01L23/5226 , H01L23/5283 , H01L23/53295
Abstract: PROBLEM TO BE SOLVED: To provide improved techniques for metal interconnection within an integrated circuit die.SOLUTION: A plurality of metal tracks are formed in three metal layers stacked in an integrated circuit die. A protective dielectric layer is formed around the metal tracks of an intermediate metal layer. The protective dielectric layer acts as a hard mask to define contact vias between the metal tracks in the metal layers above and below the intermediate metal layer.
Abstract translation: 要解决的问题：提供用于集成电路芯片内的金属互连的改进技术。解决方案：在集成电路管芯中堆叠的三个金属层中形成多个金属轨道。 在中间金属层的金属轨道周围形成保护电介质层。 保护性介电层用作硬掩模，以在中间金属层上方和下方的金属层中限定金属轨道之间的接触通孔。
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185.发明专利Multi-fin finfet device including epitaxial growth barrier on outer surface of outermost fin and related method 审中-公开包括外部外壳表面外延生长障碍物的多金属鳍片器件及相关方法
公开(公告)号：JP2014042021A
公开(公告)日：2014-03-06
申请号：JP2013164297
申请日：2013-08-07
Inventor： LIU QING , PRASANNA KHARE , NICOLAS LOUBET
IPC: H01L21/336 , H01L21/8234 , H01L21/8238 , H01L27/088 , H01L27/092 , H01L29/78 , H01L29/786
CPC classification number: H01L27/0886 , H01L21/2253 , H01L21/26506 , H01L21/26513 , H01L21/2658 , H01L21/26586 , H01L21/823418 , H01L21/823431 , H01L21/823821 , H01L21/845 , H01L29/0847 , H01L29/41783 , H01L29/41791 , H01L29/66795 , H01L29/66803 , H01L29/785
Abstract: PROBLEM TO BE SOLVED: To provide a multi-fin FINFET device which is reliable and easy to manufacture, and a method for manufacturing the same.SOLUTION: A multi-fin FINFET device may have a substrate and a plurality of semiconductor fins extending upward from the substrate and isolated along the substrate. Each of the semiconductor fins may have first and second ends on both sides and an intermediate part therebetween, and an outermost fin among the plurality of semiconductor fins may have an epitaxial growth barrier on its outer surface. The FINFET further may have at least one gate above the intermediate part of the semiconductor fin, a plurality of swell type epitaxial semiconductor source regions adjacent to a first end thereof and between semiconductor fins, and a plurality of swell type epitaxial semiconductor drain regions adjacent to a second end thereof and between semiconductor fins.
Abstract translation: 要解决的问题：提供一种可靠且易于制造的多鳍FINFET器件及其制造方法。解决方案：多鳍FINFET器件可以具有衬底和从 衬底并沿衬底分离。 每个半导体翅片可以在其两侧具有第一和第二端以及它们之间的中间部分，并且多个半导体翅片中的最外面的翅片在其外表面上可以具有外延生长阻挡层。 FINFET还可以在半导体鳍片的中间部分上方具有至少一个栅极，与其第一端相邻并且在半导体鳍片之间的多个隆起型外延半导体源极区域以及与其相邻的多个隆起型外延半导体漏极区域 其第二端和半导体鳍片之间。
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Patent Agency Ranking186.发明专利
公开(公告)号：JP2014042019A
公开(公告)日：2014-03-06
申请号：JP2013164024
申请日：2013-08-07
Inventor： LIU QING , PRASANNA KHARE , NICOLAS LOUBET
IPC: H01L21/336 , H01L21/28 , H01L21/768 , H01L21/8234 , H01L21/8238 , H01L27/088 , H01L27/092 , H01L29/78
CPC classification number: H01L21/823814 , H01L21/76816 , H01L21/823425 , H01L21/823864 , H01L29/41766 , H01L29/665 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/66628 , H01L29/66636 , H01L29/7834
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device whose contact resistance is reduced, and a method thereof.SOLUTION: A semiconductor device includes a semiconductor substrate comprising a channel region, a gate component above the channel region, and source and drain regions on both sides of the gate component. Contacts are respectively provided on the source and drain regions. At least one of the source and drain regions is provided with a gradient type upper contact surface with the respective contacts. The gradient type upper contact surface has an area at least 50% larger than that of a corresponding flat contact surface.
Abstract translation: 要解决的问题：提供一种接触电阻降低的半导体器件及其方法。解决方案：一种半导体器件包括半导体衬底，该半导体衬底包括沟道区，沟道区上方的栅极元件以及两者上的源极和漏极区 门组件的两侧。 触点分别设置在源极和漏极区域上。 源极和漏极区域中的至少一个具有与各个触点的梯度型上接触表面。 梯度型上接触面的面积比对应的平坦接触表面的面积至少大50％。
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187.发明专利
公开(公告)号：JP5426102B2
公开(公告)日：2014-02-26
申请号：JP2008047974
申请日：2008-02-28
Inventor： ジョセフ バーラク ゲイリー , ミロウスキー マリアン
IPC: H02J7/00
CPC classification number: H02H3/12 , Y10T307/549
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188.发明专利
公开(公告)号：JP5095052B2
公开(公告)日：2012-12-12
申请号：JP2001130761
申请日：2001-04-27
Inventor： エル． ウォーリー ジェームズ
IPC: G11C11/401 , G11C29/00 , G11C5/06 , G11C7/18 , G11C11/4097 , G11C29/04
CPC classification number: G11C11/4097 , G11C5/063 , G11C7/18
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189.发明专利
公开(公告)号：JP4970954B2
公开(公告)日：2012-07-11
申请号：JP2006547357
申请日：2004-12-22
Inventor： ボー チャン， , マイケル ジョン マカルソ， , オレグ ログビノフ，
CPC classification number: H04B3/54 , H04B2203/5408 , H04L27/0004 , H04L27/2601
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公开(公告)号：JP4865943B2
公开(公告)日：2012-02-01
申请号：JP2000301698
申请日：2000-10-02
Inventor： アラン エドワーズ デイビッド
CPC classification number: G06F11/3648
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