Laser lithography for integrated circuit and integrated circuit
interconnect manufacture
    187.
    发明授权
    Laser lithography for integrated circuit and integrated circuit interconnect manufacture 失效
    集成电路和集成电路互连制造的激光雕刻

    公开(公告)号:US5196376A

    公开(公告)日:1993-03-23

    申请号:US662748

    申请日:1991-03-01

    Applicant: John J. Reche

    Inventor: John J. Reche

    Abstract: A laser lithography process for semiconductor interconnect and semiconductor manufacture having the advantages of non-contact printing processes and being much faster than prior art laser lithography processes is disclosed. In accordance with the process, a metal layer to be patterned either for use as a patterned metal layer or as a mask for patterning a layer therebelow, such as a think polyimide layer, is first coated with a very thin layer of polymer evaporated as a monomer using a vapor deposition process. This provides a very thin layer of polymer over the metal layer, which thin polymer layer is readily and quickly patterned by laser to provide a mask for the subsequent chemical etching of the metal layer. The vapor deposited polymer layer, while being very thin and thus readily removed by laser, is also substantially fault free, thereby providing a high-quality mask for the chemical etching process free of any possible damage from ordinary sources such as mask aligners, etc., yet being readily removed when desired such as by way of example, by plasma etching thereof. Various methods and applications are disclosed.

    Abstract translation: 公开了一种用于半导体互连和半导体制造的激光光刻工艺,其具有非接触印刷工艺的优点并且比现有技术的激光光刻工艺快得多。 根据该方法,首先将要被图案化的图案化的金属层用作图案化金属层或作为用于图案化层的掩模,例如思亚酰胺层,涂覆有非常薄的作为 单体使用气相沉积工艺。 这在金属层上提供了非常薄的聚合物层,该薄层聚合物层通过激光容易且快速地构图,以提供用于金属层的后续化学蚀刻的掩模。 气相沉积聚合物层虽然非常薄且因此容易通过激光去除,但也基本上是无缺陷的,从而为化学蚀刻工艺提供了高质量的掩模,没有普通来源(例如掩模对准器等)的任何可能的损坏。 ,但是如果需要的话,例如通过等离子体蚀刻就容易除去。 公开了各种方法和应用。

Patent Agency Ranking