SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING STRUCTURE

    公开(公告)号:US20220384614A1

    公开(公告)日:2022-12-01

    申请号:US17776143

    申请日:2020-10-09

    Abstract: There is provided a semiconductor device, including: a substrate; a group III nitride layer on the substrate, the group III nitride layer containing group III nitride; and a recess on the group III nitride layer, the group III nitride layer including: a channel layer, and a barrier layer on the channel layer, thereby forming a two-dimensional electron gas in the channel layer, the barrier layer including: a first layer containing aluminum gallium nitride, and a second layer on the first layer, the second layer containing aluminum gallium nitride added with an n-type impurity, wherein the recess is formed by removing all or a part of a thickness of the second layer, and at least a part of a thickness of the first layer is arranged below the recess.

    METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE AND NITRIDE SEMICONDUCTOR SUBSTRATE

    公开(公告)号:US20220074071A1

    公开(公告)日:2022-03-10

    申请号:US17312617

    申请日:2019-11-29

    Inventor: Takehiro YOSHIDA

    Abstract: A method for manufacturing a nitride semiconductor substrate by using a vapor phase growth method includes: a step of preparing a base substrate that is constituted by a material different from a single crystal of a group III nitride semiconductor; a step of growing a base layer on the upper side of the base substrate; a first step of growing a first layer by epitaxially growing a single crystal of a group III nitride semiconductor directly on the base surface of the base layer, the single crystal of the group III nitride semiconductor having a top surface at which a (0001) plane is exposed, and a plurality of recessed portions formed by inclined interfaces other than the (0001) plane being generated in the top surface; and a second step of growing a second layer that has a mirror-finished surface.

    METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE, NITRIDE SEMICONDUCTOR SUBSTRATE, AND LAMINATE STRUCTURE

    公开(公告)号:US20210292931A1

    公开(公告)日:2021-09-23

    申请号:US17272169

    申请日:2019-08-22

    Inventor: Takehiro YOSHIDA

    Abstract: A method of making a semiconductor including a step of preparing a base substrate; a first step of epitaxially growing a single crystal of a group III nitride semiconductor having a top surface with (0001) plane exposed, directly on the main surface of the base substrate, forming a plurality of concaves composed of inclined interfaces other than the (0001) plane on the top surface, gradually expanding the inclined interfaces toward an upper side of the main surface of the base substrate, making the (0001) plane disappear from the top surface, and growing a first layer whose surface is composed only of the inclined interfaces; and a second step of epitaxially growing a single crystal of a group III nitride semiconductor on the first layer, making the inclined interfaces disappear, and growing a second layer having a mirror surface, and a semiconductor made thereby.

    GROUP-III NITRIDE LAMINATED SUBSTRATE AND SEMICONDUCTOR ELEMENT

    公开(公告)号:US20210184080A1

    公开(公告)日:2021-06-17

    申请号:US16952665

    申请日:2020-11-19

    Abstract: Provided is a technology capable of improving the quality of a GaN layer that is formed on an underlying substrate. A group III-nitride laminated substrate includes an underlying substrate, a first layer that is formed on the underlying substrate and is made of aluminum nitride, and a second layer that is formed on the first layer and is made of gallium nitride. The second layer has a thickness of 10 μm or less. A half-value width of (0002) diffraction determined through X-ray rocking curve analysis is 100 seconds or less, and a half-value width of (10-12) diffraction determined through X-ray rocking curve analysis is 200 seconds or less.

    Semiconductor device
    19.
    发明授权

    公开(公告)号:US10685841B2

    公开(公告)日:2020-06-16

    申请号:US15754951

    申请日:2016-08-23

    Abstract: A semiconductor device includes a semiconductor member having a mesa structure in which a first semiconductor layer and a second semiconductor layer are laminated on each other and having a pn junction; an insulating film disposed on a side surface of the mesa structure and on an outside upper surface of the mesa structure; a first electrode connected to the second semiconductor layer on the upper surface of the mesa structure, and extends on the side surface of the mesa structure and on the outside upper surface of the mesa structure on the insulating film; and a second electrode connected to the first semiconductor layer on a lower surface of the first semiconductor layer, and having a capacitance of the insulating film when a reverse bias voltage is applied between the first electrode and the second electrode, so that a first voltage applied to the insulating film between a corner position (a first position) where the side surface of the insulating film disposed on the side surface of the mesa structure and the upper surface of the insulating film disposed on the outside upper surface of the mesa structure are connected to each other, and a corner position (a second position) where the side surface of the mesa structure and the outside upper surface of the mesa structure are connected to each other, is equal to or smaller than a second voltage applied to the first semiconductor layer between a pn junction interface (a third position) in a lower part of a region where the first electrode is in contact with the second semiconductor layer, and a position directly under the third position (a fourth position) at a height of the second position.

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