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11.
公开(公告)号:US20230099777A1
公开(公告)日:2023-03-30
申请号:US17941686
申请日:2022-09-09
Applicant: SCIOCS COMPANY LIMITED , SUMITOMO CHEMICAL COMPANY, LIMITED
Inventor: Fumimasa HORIKIRI , Noboru FUKUHARA
IPC: H01L21/306 , H01L21/66 , H01L21/67
Abstract: A production apparatus for producing a structural body includes: a holding mechanism that holds a processing target in contact with an etching solution, the processing target including an etch region that is made of a Group III nitride, and on which photoelectrochemical etching is to be performed; a light emitting device that irradiates the processing target with first light for performing the photoelectrochemical etching; a light emitting device that irradiates the processing target with second light that has a wavelength longer than that of the first light; and a measurement device that measures reflected light resulting from the second light being reflected off a surface of the etch region.
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公开(公告)号:US20220384614A1
公开(公告)日:2022-12-01
申请号:US17776143
申请日:2020-10-09
Applicant: SCIOCS COMPANY LIMITED , SUMITOMO CHEMICAL COMPANY, LIMITED
Inventor: Osamu ICHIKAWA , Fumimasa HORIKIRI , Noboru FUKUHARA
IPC: H01L29/66 , H01L29/20 , H01L29/778 , H01L21/3063
Abstract: There is provided a semiconductor device, including: a substrate; a group III nitride layer on the substrate, the group III nitride layer containing group III nitride; and a recess on the group III nitride layer, the group III nitride layer including: a channel layer, and a barrier layer on the channel layer, thereby forming a two-dimensional electron gas in the channel layer, the barrier layer including: a first layer containing aluminum gallium nitride, and a second layer on the first layer, the second layer containing aluminum gallium nitride added with an n-type impurity, wherein the recess is formed by removing all or a part of a thickness of the second layer, and at least a part of a thickness of the first layer is arranged below the recess.
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公开(公告)号:US11508629B2
公开(公告)日:2022-11-22
申请号:US16312496
申请日:2017-04-03
Applicant: SCIOCS COMPANY LIMITED , SUMITOMO CHEMICAL COMPANY, LIMITED
Inventor: Fumimasa Horikiri
IPC: H01L21/205 , H01L29/812 , H01L21/66 , H01L29/778 , H01L21/02 , H01L29/20
Abstract: There is provided a nitride semiconductor laminate, including: a substrate; an electron transit layer provided on the substrate and containing a group III nitride semiconductor; and an electron supply layer provided on the electron transit layer and containing a group III nitride semiconductor, wherein a surface force A of the electron supply layer acting as an attractive force for attracting a probe and a surface of the electron supply layer when measured using the probe consisting of a glass sphere with a diameter of 1 mm covered with Cr, is stronger than a surface force B of Pt when measured under the same condition, and an absolute value |A−B| of a difference between them is 30 μN or more.
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14.
公开(公告)号:US11342191B2
公开(公告)日:2022-05-24
申请号:US17289199
申请日:2020-03-13
Applicant: SCIOCS COMPANY LIMITED , SUMITOMO CHEMICAL COMPANY, LIMITED
Inventor: Fumimasa Horikiri , Noboru Fukuhara , Taketomo Sato , Masachika Toguchi
IPC: H01L21/306 , C01G15/00 , H01L21/308 , H01L21/67 , H01L33/32
Abstract: There is provided a structure manufacturing method, including: preparing an etching target with at least one surface comprising group III nitride; then in a state where the etching target is immersed in an etching solution containing peroxodisulfate ions; irradiating the surface of the etching target with light through the etching solution, and generating sulfate ion radicals from the peroxodisulfate ions and generating holes in the group III nitride, thereby etching the group III nitride, wherein in the etching of the group III nitride, the etching solution remains acidic during a period for etching the group III nitride by making the etching solution acidic at a start of etching the group III nitride, and the etching is performed, with a resist mask formed on the surface.
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15.
公开(公告)号:US20220074071A1
公开(公告)日:2022-03-10
申请号:US17312617
申请日:2019-11-29
Applicant: SCIOCS COMPANY LIMITED , SUMITOMO CHEMICAL COMPANY, LIMITED
Inventor: Takehiro YOSHIDA
Abstract: A method for manufacturing a nitride semiconductor substrate by using a vapor phase growth method includes: a step of preparing a base substrate that is constituted by a material different from a single crystal of a group III nitride semiconductor; a step of growing a base layer on the upper side of the base substrate; a first step of growing a first layer by epitaxially growing a single crystal of a group III nitride semiconductor directly on the base surface of the base layer, the single crystal of the group III nitride semiconductor having a top surface at which a (0001) plane is exposed, and a plurality of recessed portions formed by inclined interfaces other than the (0001) plane being generated in the top surface; and a second step of growing a second layer that has a mirror-finished surface.
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公开(公告)号:US20210292931A1
公开(公告)日:2021-09-23
申请号:US17272169
申请日:2019-08-22
Applicant: SCIOCS COMPANY LIMITED , SUMITOMO CHEMICAL COMPANY, LIMITED
Inventor: Takehiro YOSHIDA
Abstract: A method of making a semiconductor including a step of preparing a base substrate; a first step of epitaxially growing a single crystal of a group III nitride semiconductor having a top surface with (0001) plane exposed, directly on the main surface of the base substrate, forming a plurality of concaves composed of inclined interfaces other than the (0001) plane on the top surface, gradually expanding the inclined interfaces toward an upper side of the main surface of the base substrate, making the (0001) plane disappear from the top surface, and growing a first layer whose surface is composed only of the inclined interfaces; and a second step of epitaxially growing a single crystal of a group III nitride semiconductor on the first layer, making the inclined interfaces disappear, and growing a second layer having a mirror surface, and a semiconductor made thereby.
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公开(公告)号:US20210184080A1
公开(公告)日:2021-06-17
申请号:US16952665
申请日:2020-11-19
Applicant: SCIOCS COMPANY LIMITED , SUMITOMO CHEMICAL COMPANY, LIMITED
Inventor: Hajime FUJIKURA , Taichiro KONNO , Takeshi KIMURA
IPC: H01L33/32
Abstract: Provided is a technology capable of improving the quality of a GaN layer that is formed on an underlying substrate. A group III-nitride laminated substrate includes an underlying substrate, a first layer that is formed on the underlying substrate and is made of aluminum nitride, and a second layer that is formed on the first layer and is made of gallium nitride. The second layer has a thickness of 10 μm or less. A half-value width of (0002) diffraction determined through X-ray rocking curve analysis is 100 seconds or less, and a half-value width of (10-12) diffraction determined through X-ray rocking curve analysis is 200 seconds or less.
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公开(公告)号:US11008671B2
公开(公告)日:2021-05-18
申请号:US16420499
申请日:2019-05-23
Applicant: SCIOCS COMPANY LIMITED , SUMITOMO CHEMICAL COMPANY, LIMITED
Inventor: Hajime Fujikura , Taichiro Konno , Takayuki Suzuki , Toshio Kitamura , Tetsuji Fujimoto , Takehiro Yoshida
IPC: C30B29/40 , H01L31/0304
Abstract: An object of the present invention is to improve quality of a group-III nitride crystal, and also improve performance and manufacturing yield of a semiconductor device manufactured using the crystal.
Provided is a nitride crystal represented by the composition formula of InxAlyGa1-x-yN (satisfying 0≤x≤1, 0≤y≤1, 0≤x+y≤1),
with a hardness exceeding 22.0 GPa as measured by a nanoindentation method using an indenter with a maximum load applied thereto being within a range of 1 mN or more and 50 mN or less.-
公开(公告)号:US10685841B2
公开(公告)日:2020-06-16
申请号:US15754951
申请日:2016-08-23
Inventor: Tohru Nakamura , Tomoyoshi Mishima , Hiroshi Ohta , Yasuhiro Yamamoto , Fumimasa Horikiri
IPC: H01L21/283 , H01L29/41 , H01L29/868 , H01L29/66 , H01L29/861 , H01L29/40 , H01L29/06 , H01L29/45 , H01L29/20
Abstract: A semiconductor device includes a semiconductor member having a mesa structure in which a first semiconductor layer and a second semiconductor layer are laminated on each other and having a pn junction; an insulating film disposed on a side surface of the mesa structure and on an outside upper surface of the mesa structure; a first electrode connected to the second semiconductor layer on the upper surface of the mesa structure, and extends on the side surface of the mesa structure and on the outside upper surface of the mesa structure on the insulating film; and a second electrode connected to the first semiconductor layer on a lower surface of the first semiconductor layer, and having a capacitance of the insulating film when a reverse bias voltage is applied between the first electrode and the second electrode, so that a first voltage applied to the insulating film between a corner position (a first position) where the side surface of the insulating film disposed on the side surface of the mesa structure and the upper surface of the insulating film disposed on the outside upper surface of the mesa structure are connected to each other, and a corner position (a second position) where the side surface of the mesa structure and the outside upper surface of the mesa structure are connected to each other, is equal to or smaller than a second voltage applied to the first semiconductor layer between a pn junction interface (a third position) in a lower part of a region where the first electrode is in contact with the second semiconductor layer, and a position directly under the third position (a fourth position) at a height of the second position.
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公开(公告)号:US10584031B2
公开(公告)日:2020-03-10
申请号:US16082598
申请日:2017-03-01
Applicant: SCIOCS COMPANY LIMITED , SUMITOMO CHEMICAL COMPANY, LIMITED
Inventor: Takehiro Yoshida , Masatomo Shibata
Abstract: There is provided a nitride crystal substrate made of a nitride crystal with a diameter of 100 mm or more, having on its main surface: a continuous high dislocation density region and a plurality of low dislocation density regions divided by the high dislocation density region, with the main surface not including a polarity inversion domain.
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