HIGH PERFORMANCE W-CDMA SLOT SYNCHRONISATION FOR INITIAL CELL SEARCH WITH REDUCED HARDWARE
    11.
    发明申请
    HIGH PERFORMANCE W-CDMA SLOT SYNCHRONISATION FOR INITIAL CELL SEARCH WITH REDUCED HARDWARE 审中-公开
    用于具有减少硬件的初始细胞搜索的高性能W-CDMA插槽同步

    公开(公告)号:WO2002073823A1

    公开(公告)日:2002-09-19

    申请号:PCT/SG2001/000039

    申请日:2001-03-13

    CPC classification number: H04B1/7083 H04B1/70735 H04B1/708

    Abstract: The present invention outlines two preferred embodiements for slot synchronisation of an initial cell search for Third-Generation Partnership Project (3GPP) Wideband Code-Division Multiple Access (W-CDMA) Frequency Division Duplex (FDD) mode system. Two Finite Impulse Response (FIR) filters are used to correlate the synchronisation codes transmited in the downlink (forward link). Sign bit is taken after the first FIR to significantly reduced the hardware requirements for the second FIR, and thus the whole system. The same hardware is repeated for the real (I) and imaginary (Q) parts of the signal before the subsequent processes. The correlated results from the second FIR can be further processed using two different alogrithms. The first is to add a square operation to the correlated results whilst the second is to take the magnitude before passing to the next stage. Regardless of which algorithm is adopted, the results are accumulated (I and Q), instead of averaged, and stored in a memory location for each successive correlation over the same location in different slots. The physical-layer processor (PLP) then reads the accumulated results from the memory location and searches for the peak position. This peak position corresponds to the actual slot boundary.

    Abstract translation: 本发明概述了用于第三代合作伙伴计划(3GPP)宽带码分多址(W-CDMA)频分双工(FDD)模式系统的初始小区搜索的时隙同步的两个优选实施例。 两个有限脉冲响应(FIR)滤波器用于将在下行链路(前向链路)传输的同步码相关联。 第一个FIR后采用符号位,大大降低了第二个FIR的硬件要求,从而降低了整个系统的硬件要求。 在后续处理之前,对于信号的实数(I)和虚部(Q)部分重复相同的硬件。 来自第二FIR的相关结果可以使用两种不同的算法来进一步处理。 第一个是对相关结果添加平方运算,而第二个是在通过下一阶段之前采取大小。 无论采用哪种算法,结果都被累积(I和Q)而不是平均值,并且存储在不同时隙中相同位置上的每个连续相关的存储器位置。 物理层处理器(PLP)然后从存储器位置读取累积的结果并搜索峰值位置。 该峰值位置对应于实际的槽边界。

    HORIZONTAL AND VERTICAL DYNAMIC CORRECTION IN CRT MONITORS
    12.
    发明申请
    HORIZONTAL AND VERTICAL DYNAMIC CORRECTION IN CRT MONITORS 审中-公开
    CRT监视器中的水平和垂直动态校正

    公开(公告)号:WO2004039062A1

    公开(公告)日:2004-05-06

    申请号:PCT/SG2002/000224

    申请日:2002-09-30

    CPC classification number: H04N3/26

    Abstract: An analog scanning processor for generation of a dynamic focus correction signal for use with a CRT is disclosed. The dynamic focus correction signal is characterised in that it is proportional to Kx 2 + (1-K)x 4 , where x is the distance from a mid point of a viewing surface of the CRT, and K is a real number in the range 0.00 to 1.00. Embodiments of the invention find particular use in CRTs having generally flatter, squarer configurations.

    Abstract translation: 公开了一种用于产生用于CRT的动态聚焦校正信号的模拟扫描处理器。 动态聚焦校正信号的特征在于它与Kx 2 +(1-K)x 4成正比,其中x是从CRT的观察表面的中点的距离,K是真实的 数字范围为0.00到1.00。 本发明的实施例在具有通常较平坦,平方的配置的CRT中特别有用。

    NON-UNIFORM FILTER BANK IMPLEMENTATION
    14.
    发明申请
    NON-UNIFORM FILTER BANK IMPLEMENTATION 审中-公开
    非均匀过滤器银行实施

    公开(公告)号:WO2003028213A1

    公开(公告)日:2003-04-03

    申请号:PCT/SG2001/000198

    申请日:2001-09-28

    CPC classification number: H03H17/0266

    Abstract: A method of searching for a best-match decimation vector of decimation factors for non-uniform filter bank, the best match vector allowing perfect or near-perfect reconstruction of an input signal of the non-uniform filter bank, the method including the steps of: a) selecting a partial decimation vector having a number, l , of decimation factors, where l does not exceed a maximum number, K , of decimation factors of said best-match decimation vector; b) testing said l decimation factors to determine whether said partial decimation vector satisfies a feasibility criterion; c) testing a least common multiplier value of said l decimation factors to determine whether said least common multiplier vale is greater than a predetermined value; d) testing a maximum decimation value, D max , of said partial decimation vector to determine whether D max is less than one; e) testing a minimum decimation value, D min , of said partial decimation vector to determine whether D min is greater than one; and f) if said feasibility criterion is satisfied and said least common multiplier value is less than said predetermined value and D max is not less than one and D min is not greater than one, incrementing by one the number of decimation factors in the partial decimation vector and repeating steps (b) to (e).

    Abstract translation: 一种搜索用于非均匀滤波器组的抽取因子的最佳匹配抽取向量的方法,所述最佳匹配向量允许非均匀滤波器组的输入信号的完美或接近完美的重建,所述方法包括以下步骤: :a)选择具有数字l抽取因子的部分抽取向量,其中l不超过所述最佳匹配抽取向量的抽取因子的最大数目K; b)测试所述l个抽取因子以确定所述部分抽取向量是否满足可行性标准; c)测试所述l个抽取因子的最小公共乘数值,以确定所述最小公共乘法器值是否大于预定值; d)测试所述部分抽取向量的最大抽取值Dmax,以确定Dmax是否小于1; e)测试所述部分抽取向量的最小抽取值Dmin,以确定Dmin是否大于1; 以及f)如果满足所述可行性标准并且所述最小公共乘数值小于所述预定值,并且Dmax不小于1且Dmin不大于1,则将部分抽取向量中的抽取因子数增加1, 重复步骤(b)至(e)。

    Dynamic noise sampling for unspecified display noise

    公开(公告)号:US12164724B2

    公开(公告)日:2024-12-10

    申请号:US18490475

    申请日:2023-10-19

    Abstract: A method includes: displaying, an image on a display by sequentially displaying a plurality of frames of the image, the plurality of frames including a first frame and second frame; performing a first noise sampling scan at a plurality of frequencies at a first time location within a first frame; determining a first frequency from the plurality of frequencies with the lowest noise; performing a first mutual sensing scan at the first frequency; performing, a second noise sampling scan at the plurality of frequencies at a second time location within a second frame of the plurality of frames, the second time location being a different frame location than the first time location; determining a second frequency from the plurality of frequencies with the lowest noise, the second frequency being different from the first frequency; and performing, a second mutual sensing scan at the second frequency.

    LDO free wireless power receiver having regtifier

    公开(公告)号:US12040628B2

    公开(公告)日:2024-07-16

    申请号:US17576052

    申请日:2022-01-14

    Inventor: Yannick Guedon

    CPC classification number: H02J50/12 H02M1/0025 H02M7/219

    Abstract: A bridge rectifier is controlled by control circuitry to act a “regtifier” which both regulates and rectifies without the use of a traditional voltage regulator. To accomplish this, the gate voltages of transistors of the bridge that are on during a given phase may be modulated to dissipate excess power. Gate voltages of transistors of the bridge that are off during the given phase may alternatively or additionally be modulated to dissipate excess power. The regtifier may act as two half-bridges that each power a different voltage converter, with those voltage converters powering a battery. The voltage converters may be switched capacitor voltage converters that switch synchronously with switching of the two half-bridges as they perform rectification.

    DYNAMIC NOISE SAMPLING FOR UNSPECIFIED DISPLAY NOISE

    公开(公告)号:US20230333691A1

    公开(公告)日:2023-10-19

    申请号:US17659617

    申请日:2022-04-18

    CPC classification number: G06F3/0418 G06F3/0446

    Abstract: A method includes: displaying, an image on a display by sequentially displaying a plurality of frames of the image, the plurality of frames including a first frame and second frame; performing a first noise sampling scan at a plurality of frequencies at a first time location within a first frame; determining a first frequency from the plurality of frequencies with the lowest noise; performing a first mutual sensing scan at the first frequency; performing, a second noise sampling scan at the plurality of frequencies at a second time location within a second frame of the plurality of frames, the second time location being a different frame location than the first time location; determining a second frequency from the plurality of frequencies with the lowest noise, the second frequency being different from the first frequency; and performing, a second mutual sensing scan at the second frequency.

    Foreign objection detection sensing circuit for wireless power transmission systems

    公开(公告)号:US11658518B2

    公开(公告)日:2023-05-23

    申请号:US17408824

    申请日:2021-08-23

    CPC classification number: H02J50/60 H02J50/12

    Abstract: A wireless power circuit operable in transceiver mode and in Q-factor measurement mode includes a bridge rectifier having first and second inputs coupled to first and second terminals of a coil, and an output coupled to a rectified node. An excitation circuit coupled to the first terminal, in Q-factor measurement mode, drives the coil with a pulsed signal. A protection circuit couples the first terminal to a first node when in Q-factor measurement mode and decouples the first terminal when in transceiver mode. A controller causes the bridge rectifier to short the first and second terminals to ground during Q-factor measurement mode. A sensing circuit amplifies voltage at the first node to produce an output voltage, and in response to the voltage at the first node rising to cross a rising threshold voltage, digitizes the output voltage. The digitized output voltage is used in calculating a Q-factor of the coil.

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