公开(公告)号：WO2017087544A1

公开(公告)日：2017-05-26

申请号：PCT/US2016/062316

申请日：2016-11-16

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： MALKIN, Kirill ,  DEAN, Steve ,  WOODACRE, Michael ,  GOH, Eng, Lim

IPC: G06F9/50 ,  G06F11/07 ,  H04L12/24 ,  H04L29/06

CPC classification number: G06F3/0607 ,  G06F3/0635 ,  G06F3/0685 ,  G06F3/0688 ,  G06F9/5027 ,  G06F2209/509 ,  Y02D10/22 ,  Y02D10/36

Abstract: In high performance computing, the potential compute power in a data center will scale to and beyond a billion-billion calculations per second ("Exascale" computing levels). Limitations caused by hierarchical memory architectures where data is temporarily stored in slower or less available memories will increasingly limit high performance computing systems from approaching their maximum potential processing capabilities. Furthermore, time spent and power consumed copying data into and out of a slower tier memory will increase costs associated with high performance computing at an accelerating rate. New technologies, such as the novel Zero Copy Architecture disclosed herein, where each compute node writes locally for performance, yet can quickly access data globally with low latency will be required. The result is the ability to perform burst buffer operations and in situ analytics, visualization and computational steering without the need for a data copy or movement.

Abstract translation: 在高性能计算中，数据中心中的潜在计算能力将扩展到并超过每秒十亿次计算（“Exascale”计算水平）。 分层存储器架构造成的限制将数据临时存储在较慢或较少的可用存储器中，这将限制高性能计算系统接近其最大潜在处理能力。 此外，将数据复制到慢速内存中所花费的时间和功耗将以更快的速度增加与高性能计算相关的成本。 新技术，例如这里公开的新颖零复制体系结构，其中每个计算节点为了性能而本地写入，但可以以低等待时间快速访问全局数据。 其结果是能够执行突发缓冲区操作和原位分析，可视化和计算控制，而无需数据复制或移动。

公开(公告)号：WO2016183328A1

公开(公告)日：2016-11-17

申请号：PCT/US2016/032117

申请日：2016-05-12

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： MALKIN, Kirill

IPC: G06F9/46

CPC classification number: G06F13/1663 ,  G06F9/5016 ,  G06F9/5077 ,  G06F9/52 ,  G06F9/526

Abstract: A scalable software stack is disclosed, in particular, the present disclosure provides a system and a method directed at allocating logical ownership of memory locations in a shared storage device among two or more associated compute devices that have access to the storage device. The logical ownership allocation can minimize potential conflicts between two simultaneous accesses occurring within the same memory location of the storage device.

Abstract translation: 公开了一种可扩展的软件堆栈，特别地，本公开提供了一种系统和方法，该系统和方法旨在分配在具有访问存储设备的两个或更多个相关联的计算设备中的共享存储设备中的存储器位置的逻辑所有权。 逻辑所有权分配可以最小化在存储设备的相同存储器位置内发生的两次同时访问之间的潜在冲突。

公开(公告)号：WO2015148895A1

公开(公告)日：2015-10-01

申请号：PCT/US2015/022935

申请日：2015-03-27

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： SIKKINK, Mark, Ronald ,  DE RYCKERE, Jonn, Francis

IPC: G06F11/10

CPC classification number: H03M13/17 ,  H03M13/09 ,  H03M13/11 ,  H04L1/0057 ,  H04L1/0061 ,  H04L1/0079 ,  H04L1/0083 ,  H04L25/14 ,  H04L25/4908

Abstract: A high performance computing system and method communicate data packets between computing nodes on a multi-lane communications link using a modified header bit encoding. Each data packet is provided with flow control information and error detection information, then divided into per-lane payloads. Sync header bits for each payload are added to the payloads in non-adjacent locations, thereby decreasing the probability that a single correlated burst error will invert both header bits. The encoded blocks that include the payload and the interspersed header bits are then simultaneously transmitted on the multiple lanes for reception, error detection, and reassembly by a receiving computing node.

Abstract translation: 高性能计算系统和方法使用修改的报头位编码在多通道通信链路上的计算节点之间传送数据分组。 每个数据包都提供流量控制信息和错误检测信息，然后划分为每通道有效载荷。 每个有效载荷的同步头位被添加到非相邻位置中的有效载荷，从而降低单个相关突发错误将颠倒两个标题位的概率。 然后，在多个通道上同时发送包含有效载荷和散布的报头位的编码块，以便接收计算节点进行接收，错误检测和重组。

公开(公告)号：WO2015138693A1

公开(公告)日：2015-09-17

申请号：PCT/US2015/020126

申请日：2015-03-12

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： MALEWICKI, Michael, E.

IPC: G06F15/16 ,  G06F9/445

CPC classification number: G06F12/0831 ,  G06F2212/621

Abstract: An apparatus and method of accessing data in a memory in a multi-node, high performance computing system has a requesting agent and a home agent. The requesting agent is a member of a first node of the high performance computing system, while the home agent is a member of a second node of the high performance computing system. The home agent forwards data in a specified memory toward the requesting agent across the unordered network, and determines that a snoop request is to be sent to the requesting agent. After determining that the requesting agent has received the requested data in the specified memory of the second node, the home agent forwards the snoop request to the requesting agent across the unordered network.

Abstract translation: 一种访问多节点，高性能计算系统中的存储器中的数据的装置和方法具有请求代理和归属代理。 请求代理是高性能计算系统的第一个节点的成员，而归属代理是高性能计算系统的第二个节点的成员。 归属代理器通过无序网络向指定的存储器转发数据到请求代理，并且确定将窥探请求发送到请求代理。 在确定请求代理已经在第二节点的指定存储器中接收到所请求的数据之后，归属代理程序通过无序网络将请求代理转发给请求代理。

公开(公告)号：WO2015070185A1

公开(公告)日：2015-05-14

申请号：PCT/US2014/064888

申请日：2014-11-10

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： LIAO, Cheng

IPC: G06F17/16

CPC classification number: G06F9/544 ,  G06F9/4887 ,  G06F9/5016 ,  G06F9/5066 ,  G06F12/08 ,  G06F17/16 ,  G06F2212/2542 ,  G06T1/60

Abstract: Disclosed herein is a shared memory systems that use a combination of SBR and MRRR techniques to calculate eigenpairs for dense matrices having very large numbers of rows and columns. The disclosed system allows for the use of a highly scalable tridiagonal eigensolver. The disclosed system likewise allows for allocating a different number of tOOhreads to each of the different computational stages of the eigensolver.

Abstract translation: 这里公开了一种共享存储器系统，其使用SBR和MRRR技术的组合来计算具有非常大数量的行和列的密集矩阵的特征对。 所公开的系统允许使用高度可缩放的三角形固定器。 所公开的系统同样允许将不同数量的tOOhread分配给固定器的每个不同计算阶段。

公开(公告)号：WO2014179819A3

公开(公告)日：2014-11-06

申请号：PCT/US2014/044930

申请日：2014-06-30

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： SARKAR, Sanhita ,  MORCOS, Raymon

IPC: G06F9/44

Abstract: An adapter retrieves graph data from one or more graph databases and adapts the data to be shown through a visualization tool. The adapter may be used to convert multiple formats of graph data into a format which is readable and useable by the visualization tool. The adapter module may make a connection with a graph database and query the database for particular graph data. Once retrieved, the stream of retrieved graph data may be used to populate a template in Java form. From the template, the visualization tool may provide a visualization of the retrieved data.

公开(公告)号：WO2014160556A2

公开(公告)日：2014-10-02

申请号：PCT/US2014/031003

申请日：2014-03-18

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： DEAN, Steven J. ,  COLLINS, David R. ,  KINYON, Paul

CPC classification number: G06F12/0246 ,  G06F1/263 ,  G06F3/0635 ,  G06F11/2002 ,  G06F11/2007 ,  G06F11/201 ,  G06F11/2084 ,  G06F11/2089

Abstract: A high performance computing (HPC) system includes computing blades having a first region that includes processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation and another computing processor for performing data movement and storage. Because data movement and storage are offloaded to the secondary processor, the processors for performing the computation are not interrupted to perform these tasks. A method for use in the HPC system receives instructions in the computing processors and first data in the memory. The method includes receiving second data into the memory while continuing to execute the instructions in the computing processors, without interruption. A computer program product implementing the method is also disclosed.

Abstract translation: 高性能计算（HPC）系统包括具有包括用于执行计算的处理器的第一区域的计算刀片和包括用于执行计算的非易失性存储器的第二区域和用于执行数据移动和存储的另一个计算处理器。 由于数据移动和存储被卸载到次要处理器，所以用于执行计算的处理器不被中断以执行这些任务。 在HPC系统中使用的方法接收计算处理器中的指令和存储器中的第一数据。 该方法包括：在不间断地继续执行计算处理器中的指令的同时，将第二数据接收到存储器中。 还公开了一种实现该方法的计算机程序产品。

公开(公告)号：WO2014149332A1

公开(公告)日：2014-09-25

申请号：PCT/US2014/017291

申请日：2014-02-20

Applicant: SILICON GRAPHICS INTERNATIONAL CORP

Inventor： CHRISTOFFERSON, Floyd, William

IPC: G06F12/00

CPC classification number: G06F17/30073 ,  G06F17/30082 ,  G06F17/303

Abstract: A primary data storage system is connected with a separate and external active archive storage system to consolidate data and allow active archive data to be managed based on primary storage system events. The primary data storage system may be managed and maintained by an external entity, and may include a manager module such as a resource manager. The active archive system may include several tiers of storage in a hierarchical storage system and logic for moving data between and among the tiers. As data processing milestones are completed or the state of data changes, in projects stored in the primary data storage system, task milestone or state change events are detected. Event detection can trigger data movement in the active archive solution. One or more software modules implementing the present invention may detect the events and trigger active archive operations based on the events.

Abstract translation: 主数据存储系统与单独的和外部的主动归档存储系统连接，以整合数据，并允许基于主存储系统事件来管理主动归档数据。 主数据存储系统可以由外部实体管理和维护，并且可以包括诸如资源管理器之类的管理器模块。 主动存档系统可以包括分层存储系统中的多层存储和用于在层之间和之间移动数据的逻辑。 随着数据处理里程碑的完成或数据状态的变化，在存储在主数据存储系统中的项目中，检测到任务里程碑或状态改变事件。 事件检测可以触发主动存档解决方案中的数据移动。 实现本发明的一个或多个软件模块可以基于事件检测事件并触发主动存档操作。

公开(公告)号：WO2014074236A1

公开(公告)日：2014-05-15

申请号：PCT/US2013/061469

申请日：2013-09-24

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： DEAN, Steven J. ,  COLLINS, David R. ,  MCCANN, Timothy Scott ,  FRANZ, Perry D. ,  GLANZMAN, Jeffrey M.

IPC: H05K5/00 ,  G06F1/20

CPC classification number: G06F1/20 ,  G06F1/181 ,  G06F2200/201 ,  H05K7/20754 ,  H05K7/20827

Abstract: A cooling system for a high performance computing system includes a closed-loop cooling cell having two compute racks and a cooling tower between the compute racks. Each compute rack includes one blade enclosure, and the cooling tower includes one water-cooled heat exchanger and one or more blowers configured to draw warm air from a side of the compute racks towards a back, across the water-cooled heat exchanger, and to circulate cooled air to a side of the compute racks towards a front. The cooling cell further includes a housing enclosing the compute racks and the cooling tower to provide a closed-loop air flow within the cooling cell. The cooling system further includes cooling plate(s) configured to be disposed between two computing boards within the computing blade, and a fluid connection coupled to the cooling plate and in fluid communication with the blade enclosure.

Abstract translation: 用于高性能计算系统的冷却系统包括具有两个计算机架和在计算机架之间的冷却塔的闭环冷却单元。 每个计算机架包括一个叶片外壳，并且冷却塔包括一个水冷热交换器和一个或多个鼓风机，其构造成将热空气从计算机架的侧面朝向后部穿过水冷式热交换器，并且 将冷却的空气循环到计算机架的一侧朝向前部。 冷却单元还包括封闭计算机架和冷却塔的壳体，以在冷却单元内提供闭环空气流。 冷却系统还包括构造成设置在计​​算刀片内的两个计算板之间的冷却板，以及耦合到冷却板并与叶片外壳流体连通的流体连接。

公开(公告)号：WO2016182851A3

公开(公告)日：2016-11-17

申请号：PCT/US2016/031001

申请日：2016-05-05

Applicant: SILICON GRAPHICS INTERNATIONAL CORP.

Inventor： GOH, Eng Lim ,  DONLIN, Patrick ,  WARNER, Andrew

IPC: G06F1/20 ,  G06F1/26 ,  G06F1/30

Abstract: An apparatus and method thermally manage a high performance computing system having a plurality of nodes with microprocessors. To that end, the apparatus and method monitor the temperature of at least one of a) the environment of the high performance computing system and b) at least a portion of the high performance computing system. In response, the apparatus and method control the processing speed of at least one of the microprocessors on at least one of the plurality of nodes as a function of at least one of the monitored temperatures.