公开(公告)号：US10854566B2

公开(公告)日：2020-12-01

申请号：US16561546

申请日：2019-09-05

Applicant: ULTRA DISPLAY TECHNOLOGY CORP.

Inventor： Hsien-Te Chen

IPC: H01L23/52 ,  H01L23/00 ,  H01L33/62

Abstract: A pre-conductive array disposed on a target circuit substrate comprises a plurality of conductive electrode groups disposed on the target circuit substrate, and at least a conductive particle dispose on each of conductive electrodes of a part or all of the conductive electrode groups. The at least a conductive particle and the corresponding conductive electrode form a pre-conductive structure, and the pre-conductive structures form the pre-conductive array.

公开(公告)号：US20190280151A1

公开(公告)日：2019-09-12

申请号：US16291808

申请日：2019-03-04

Applicant: ULTRA DISPLAY TECHNOLOGY CORP.

Inventor： Hsien-Te CHEN

IPC: H01L33/00 ,  H01L27/15 ,  H01L33/52

Abstract: A manufacturing method of an optoelectronic semiconductor device includes: providing a matrix substrate, which comprises a substrate and a matrix circuit disposed on the substrate; transferring a plurality of micro-sized optoelectronic semiconductor elements from a temporary substrate to the matrix substrate, wherein the micro-sized optoelectronic semiconductor elements are separately disposed on the matrix substrate, and at least one electrode of each micro-sized optoelectronic semiconductor element is electrically connected with the matrix circuit; forming a protective layer completely covering the micro-sized optoelectronic semiconductor elements, wherein the height of the protective layer is greater than the height of the micro-sized optoelectronic semiconductor elements; and grinding the protective layer until a residual on a back surface of each micro-sized optoelectronic semiconductor element and the back surface are removed to expose a new surface.

公开(公告)号：US20210111148A1

公开(公告)日：2021-04-15

申请号：US17131092

申请日：2020-12-22

Applicant: Ultra Display Technology Corp.

Inventor： Hsien-Te CHEN

IPC: H01L23/00

Abstract: A method of using an optoelectronic semiconductor stamp to manufacture an optoelectronic semiconductor device comprises the following steps: a preparation step: preparing at least one optoelectronic semiconductor stamp group and a target substrate, wherein each optoelectronic semiconductor stamp group comprises at least one optoelectronic semiconductor stamp, each optoelectronic semiconductor stamp comprises a plurality of optoelectronic semiconductor components disposed on a heat conductive substrate, each optoelectronic semiconductor component has at least one electrode, and the target substrate has a plurality of conductive portions; an align-press step: aligning and attaching at least one optoelectronic semiconductor stamp to the target substrate, so that the electrodes are pressed on the corresponding conductive portions; and a bonding step: electrically connecting the electrodes to the corresponding conductive portions.

公开(公告)号：US10796628B2

公开(公告)日：2020-10-06

申请号：US16172463

申请日：2018-10-26

Applicant: ULTRA DISPLAY TECHNOLOGY CORP.

Inventor： Hsien-Te Chen

IPC: G09G3/34 ,  H04N5/367 ,  G09G3/32

Abstract: A luminance compensation method of a light-emitting device is disclosed. The light-emitting device has a plurality of light-emitting elements. The luminance compensation method includes following steps of: obtaining a position of at least one of the light-emitting elements in a brightness anomalous status; and changing a brightness of at least one of the light-emitting elements disposed adjacent to the light-emitting element in the brightness anomalous status for compensating a brightness of the light-emitting elements in the brightness anomalous status.

公开(公告)号：US20190189477A1

公开(公告)日：2019-06-20

申请号：US16224277

申请日：2018-12-18

Applicant: Ultra Display Technology Corp.

Inventor： Hsien-Te CHEN

IPC: H01L21/67 ,  H01L21/683

CPC classification number: H01L21/67132 ,  H01L21/6835 ,  H01L2221/68322 ,  H01L2221/68363

Abstract: An optoelectronic semiconductor stamp and a manufacturing method thereof, and an optoelectronic semiconductor device are disclosed. The manufacturing method comprises the following steps: pressing an optoelectronic semiconductor substrate to an UV tape, wherein the electrodes of a plurality of optoelectronic semiconductor components are adhered to the UV tape; removing the epitaxial substrate, wherein at least a part of the optoelectronic semiconductor components are adhered to the UV tape; decreasing adhesion of at least a part of the UV tape; and picking up at least a part of the optoelectronic semiconductor components corresponding to the part of the UV tape with reduced adhesion by a heat conductive substrate, wherein the part of the optoelectronic semiconductor components corresponding to the part of the UV tape with reduced adhesion is removed from the UV tape so as to obtain an optoelectronic semiconductor stamp.

公开(公告)号：US20190035688A1

公开(公告)日：2019-01-31

申请号：US16045072

申请日：2018-07-25

Applicant: ULTRA DISPLAY TECHNOLOGY CORP.

Inventor： Hsien-Te CHEN

IPC: H01L21/78 ,  H01L21/56 ,  H01L21/683

Abstract: A method of batch transferring micro semiconductor structures is provided. The method utilizes the selective laser lift-off (selective LLO) technology, and the micro semiconductor structures are selected in batch during the selective LLO process. Thus, the following transferring step does not need to prepare the concave patterns in advance, thereby avoiding the technical difficult derived by the micro-contact printing process.

公开(公告)号：US20180068995A1

公开(公告)日：2018-03-08

申请号：US15696541

申请日：2017-09-06

Applicant: ULTRA DISPLAY TECHNOLOGY CORP.

Inventor： Yoshitaka KAJIYAMA

IPC: H01L25/00 ,  H01L25/13 ,  H01L21/683

CPC classification number: H01L25/50 ,  H01L21/6835 ,  H01L25/0753 ,  H01L25/13 ,  H01L33/50 ,  H01L33/60 ,  H01L2933/0058

Abstract: An optoelectronic semiconductor device and a manufacturing method are disclosed. The manufacturing method includes steps of: a step of providing a microsized optoelectronic semiconductor element, a step of providing a matrix substrate, a step of electrode alignment and lamination, a step of electrode coupling, a step of illumination and lift-off and a step of removal. The step of electrode coupling is to provide a first light to concentratedly illuminate at least some of the junctions between the first electrodes and the third electrodes or concentratedly illuminate at least some of the junctions between the second electrodes and the fourth electrodes. The step of illumination and lift-off is to provide a second light to concentratedly illuminate at least some of the interfaces between the microsized optoelectronic semiconductor elements and the epitaxial substrate to make the microsized optoelectronic semiconductor elements illuminated by the second light peel off the epitaxial substrate.

公开(公告)号：TWI689105B

公开(公告)日：2020-03-21

申请号：TW107142782

申请日：2018-11-29

Applicant: 優顯科技股份有限公司 ,  ULTRA DISPLAY TECHNOLOGY CORP.

Inventor： 陳顯德 ,  CHEN, HSIEN-TE

IPC: H01L31/0236 ,  H01L31/18

公开(公告)号：US12148786B2

公开(公告)日：2024-11-19

申请号：US18505463

申请日：2023-11-09

Applicant: ULTRA DISPLAY TECHNOLOGY CORP.

Inventor： Hsien-Te Chen

IPC: H01L31/062 ,  G01R31/26 ,  H01L27/146 ,  H01L31/113

Abstract: An electronic detection interface for testing micro photoelectric chips or micro semiconductor chips comprises a substrate structure and a plurality of detection units in array, responsive to the micro photoelectric chips or the micro semiconductor chips. The substrate structure includes a circuit layer, which comprises a plurality of circuit units in array. The detection units are disposed on a surface of the substrate structure, and are corresponded to the circuit units in a respect manner. Each of the detection units includes at least one resilient conductive pillar, which is electrically connected to each of the circuit units. Each of the resilient conductive pillars comprises a non-conductive photoresist and a conductive layer entirely covering the non-conductive photoresist.

公开(公告)号：US20240235141A1

公开(公告)日：2024-07-11

申请号：US18404257

申请日：2024-01-04

Applicant: ULTRA DISPLAY TECHNOLOGY CORP.

Inventor： Hsien-Te CHEN

IPC: H01R43/02

CPC classification number: H01R43/0221

Abstract: An electronic device manufacturing system includes a fixture, a target platform, wire mechanisms and a wire breaking mechanism. The fixture has a substrate defining plural channels. The target platform is located at one side of the fixture and defines a plane and plural target positions. Each wire mechanism has a shaft and a wire. The channels of the fixture correspond to at least part of the target positions, and the wire mechanisms correspond to the channels, respectively. The wire of each wire mechanism passes through the corresponding channel, and the fixed end thereof is located at the other side of the fixture, while the free end thereof is located on the target platform and corresponds to one of the target positions. The wire breaking mechanism is located between the fixture and the target platform for cutting the wires so as to form plural wire segments.