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公开(公告)号：KR101862934B1
公开(公告)日：2018-05-30
申请号：KR1020160135065
申请日：2016-10-18
Applicant: 국방과학연구소
IPC: G01S19/01
Abstract: 본발명은재밍탐지기술에관한것으로서, 더상세하게는상용 GPS 안테나, GPS(Global Positioning System) 수신기, 항재밍안테나, 항재밍안테나시스템, EGI(Embedded GPS/INS(Inertial Navigation System))의다중채널로구성된장치로서, 항재밍안테나와항재밍안테나시스템이잡음재밍에대한내성을보유하고, SAASM(Selective Availability Anti Spoofing Module) 칩이적용된 EGI가기만재밍에대한내성을보유하고있다는특성을활용하여, 잡음재밍신호와기만재밍신호의출현을탐지하여복수로시현및/또는음성경보를할 수있는실시간 GPS 재밍탐지시스템및 방법에대한것이다.
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公开(公告)号：KR101509569B1
公开(公告)日：2015-04-07
申请号：KR1020140154316
申请日：2014-11-07
Applicant: 국방과학연구소
IPC: G01S3/04
Abstract: 본발명의지구곡률과신호방향정보를이용한신호원위치추정방법은이동센서신호원또는다수의고정센서신호원(200,...,240)을이용한신호원의위치추정시, 지구의곡률을반영하여신호원의위치를추정함으로써평면직교좌표계에서삼각측량방식을이용할경우에발생할수 있는왜곡을없애고, 삼각측량결과를 3차원지구곡면에투사하는과정을없앨수 있어위치추정정확도와위치추정에필요한연산량을모두향상시킬수 있다. 특히, 방향벡터의직교성을이용한 2개의방향측정값으로보다빠르고정확하게초기위치추정값을산출함으로써위치추정시 초기값에따라위치추정값의수렴속도가결정되는특성이활용되어져최종위치추정값이보다간단하고빠르게추출된다. 또한, 위치를추정함에있어과다한보정값을조정하여추정값이발산하지않도록처리하여안정된성능을확보하는특징을갖는다.
Abstract translation: 使用本发明的地球曲率和信号方向信息的信号源位置确定方法能够：去除在平面正交坐标系中使用三角测量方式可能产生的失真，其中反映地球曲率并估计一个 当通过使用移动传感器信号源或多个固定传感器信号源（200，...，240）来估计信号源的位置时信号源的位置; 并且去除将三角测量结果投影到三维地球曲面的处理，从而改进位置估计精度和位置估计所需的计算。 具体地说，由于当使用估计位置时的初始值来确定位置估计值的收敛速度的特性被更快地利用，并且利用使用方向正交性的两个方向估计值来精确地计算初始位置的估计值 向量，最后的位置估计值越多越简单快速地提取。 此外，本发明的特征在于，通过在估计位置时调整过度的校正值，而不使估计值发散，来确保稳定的性能。
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公开(公告)号：KR102242427B1
公开(公告)日：2021-04-20
申请号：KR1020200146224
申请日：2020-11-04
Applicant: 국방과학연구소
Abstract: 일실시예에따른신호방향탐지장치는, 다수의안테나에대응하는다수의수신채널에대한스위칭소자의스위칭상태에따라상기다수의수신채널중 두개의수신채널을통하여신호를수신하는수신부와, 상기스위칭소자의스위칭상태가변경되도록구동하는스위칭구동부와, 상기수신부에의한수신신호의세기를측정하는측정부와, 상기수신부가상기다수의수신채널각각을통하여신호를수신하도록상기스위칭구동부를제어하고, 상기다수의수신채널중 상기측정부에의해측정된수신신호의세기가가장큰 수신채널을기준채널로설정하며, 상기수신부가상기기준채널이포함된두 개의수신채널을통하여신호를수신하도록상기스위칭구동부를제어하는제어부와, 상기기준채널이포함된두 개의수신채널을통한상기수신부의수신신호에대하여방향을탐지하는방향탐지부를포함한다.
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Patent Agency Ranking
公开(公告)号：KR102217157B1
公开(公告)日：2021-02-19
申请号：KR1020200123339
申请日：2020-09-23
Applicant: 국방과학연구소
Abstract: 지구의곡률에따른오차뿐만아니라센서와신호원의고도에따른오차및 항공기의피치에따른오차를고려하여신호원의위치를추정함으로써위치추정의정확도를향상하기위한기술에관한것이다. 이때, 위치추정방법은복수의센서로부터측정데이터를수신하는단계; 상기측정데이터에기초하여상기신호원의제1 위치데이터를추정하는단계; 상기제1 위치데이터에대한고도오차를확인하는단계; 및상기고도오차를고려하여상기제1 위치데이터를보정한제2 위치데이터를추정하는단계를포함할수 있다.
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公开(公告)号：KR101719479B1
公开(公告)日：2017-03-24
申请号：KR1020150056608
申请日：2015-04-22
Applicant: 국방과학연구소
IPC: B64F5/00
Abstract: 본발명은, 베이스부재와, 상기베이스부재에연결되어상하이동되도록이루어지는승강수단, 및상기승강수단의상부에배치되며, 적재물이올려지도록형성되는적재부를포함하고, 상기적재부는, 상기승강수단의상부에배치되는좌우이동부재와, 상기좌우이동부재와연결되어상기좌우이동부재를좌우로이동시키도록이루어지는좌우이동구동부와, 상기좌우이동부재의상부에배치되는전후이동부재와, 상기전후이동부재와연결되어상기전후이동부재를전후로이동시키도록이루어지는전후이동구동부와, 상기적재물을회전시키기위하여상기전후이동부재에회전가능하게결합되는회전부재, 및상기회전부재의상부에배치되며상기적재물이일면상에안착가능하게형성되는회전적재대를포함하는것을특징으로하는항공기장비의착탈을위한장치를제공한다.
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公开(公告)号：KR1020140039894A
公开(公告)日：2014-04-02
申请号：KR1020120106705
申请日：2012-09-25
Applicant: 국방과학연구소
IPC: H04L25/17
CPC classification number: G01S7/021 , G01S7/285 , G01S2007/406
Abstract: The present invention relates to a digital receiver for receiving and processing a microwave signal and a signal processing method for the same. According to an embodiment of the present invention, the signal processing method for a digital receiver comprises a step of setting multiple frequency channels to make each frequency channel partially have a frequency domain identical to that of an adjacent frequency channel; a step of detecting a first signal on each frequency channel; a step of checking whether a second signal corresponding to the first signal is detected on the adjacent frequency channel when the first signal is detected in the frequency domain; and a step of generating a pulse description word (PDW) on the first signal according to the detection of the second signal. [Reference numerals] (120) Frequency converter; (130) Analog-Digital converter; (140) Channel separator; (150) Channel processor; (160) PDW storage; (170) PDW analyzer
Abstract translation: 本发明涉及用于接收和处理微波信号的数字接收机及其信号处理方法。 根据本发明的实施例，数字接收机的信号处理方法包括设置多个频道以使每个频道部分地具有与相邻频道相同的频域的步骤; 检测每个频道上的第一信号的步骤; 在频域中检测到第一信号时，检查相邻频道上是否检测到与第一信号相对应的第二信号的步骤; 以及根据第二信号的检测对第一信号产生脉冲描述字（PDW）的步骤。 （附图标记）（120）变频器; （130）模拟数字转换器; （140）通道分离器; （150）通道处理器; （160）PDW存储; （170）PDW分析仪
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公开(公告)号：KR101265494B1
公开(公告)日：2013-05-16
申请号：KR1020120128578
申请日：2012-11-14
Applicant: 국방과학연구소
CPC classification number: H04L27/2652
Abstract: PURPOSE: A multi-phase filter bank system for oversampling is provided to reduce hardware demand. CONSTITUTION: A filter unit has a plurality of sub-filters(770). The plurality of sub-filters includes N numbers of first delay device among each filter tap for N times oversampling. An FFF(Fast Fourier Transform) unit receives a signal from the filter unit and converts the signal into a plurality of channels. A superposition circuit(710) includes a parallel output circuit(730) inputting a signal in parallel with the filter unit and N numbers of second delay devices applying a constant delay to the output signal from the parallel output circuit. A phase shifter(780) compensates phase difference generated due to the N times oversampling in every output of each channel while being fixed to each channel of the filter unit. [Reference numerals] (720) Serial input-parallel output buffer(M/N numbers of output); (AA) Sample clock
Abstract translation: 目的：提供用于过采样的多相滤波器组系统，以减少硬件需求。 构成：过滤器单元具有多个子过滤器（770）。 多个子滤波器包括用于N次过采样的每个滤波器抽头中的N个第一延迟装置。 FFF（快速傅立叶变换）单元从滤波器单元接收信号并将该信号转换成多个信道。 叠加电路（710）包括与滤波器单元并联输入信号的并行输出电路（730）和对来自并行输出电路的输出信号施加恒定延迟的N个第二延迟器件。 移相器（780）在固定到滤波器单元的每个通道的同时，补偿由于每个通道的每个输出中的N次过采样产生的相位差。 （附图标记）（720）串行输入并行输出缓冲器（M / N个输出）; （AA）采样时钟
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