워치독 타이밍 회로
    11.
    发明授权
    워치독 타이밍 회로 失效
    手表时序电路

    公开(公告)号:KR1019940008853B1

    公开(公告)日:1994-09-28

    申请号:KR1019920009197

    申请日:1992-05-28

    Inventor: 김덕수

    Abstract: The watch dog timing circuit includes a first latch for instructing stop/operation of the watch dog timing according to the output of a central processing unit, a third latch for latching the output of the central processing unit, a NOR gate for deciding a watch dog cycle according to the initial signal of the central processing unit and the clear signal of the first latch, a counter for counting signals of a clock stage using the output of the NOR gate as a clear signal, a comparator for comparing the output of the counter with the output of the third latch, a reset circuit for generating a reset signal for resetting the central processing unit, and a second latch for generating a reset out signal of the reset circuit by latching the output of the comparator with a clock inverted by inverting the clock of the clock stage using an inverter.

    Abstract translation: 看门狗定时电路包括用于根据中央处理单元的输出指示停止/操作看门狗定时的第一锁存器,用于锁存中央处理单元的输出的第三锁存器,用于判定监视狗的NOR门 根据中央处理单元的初始信号和第一锁存器的清零信号周期,使用NOR门的输出作为清零信号对时钟级的信号进行计数的计数器,比较器,用于比较计数器的输出 第三锁存器的输出,用于产生用于复位中央处理单元的复位信号的复位电路和用于通过将反相的时钟锁存在比较器的输出端来产生复位电路的复位信号的第二锁存器 时钟的时钟使用逆变器。

    LED 프린터의 LED 헤드 제어회로
    12.
    发明授权
    LED 프린터의 LED 헤드 제어회로 失效
    LED打印机LED头控制电路

    公开(公告)号:KR1019940002880B1

    公开(公告)日:1994-04-06

    申请号:KR1019910000654

    申请日:1991-01-16

    Inventor: 김덕수

    Abstract: The LED head controlling circuit comprises a central controller for outputting data such as print start/finish, horizontal sync signal period, and the state of paper supply; a print start/finish controller for latching the print start/finish data and initialized with an initialization signal; a first latch for latching the horizotal sync signal period data and initialized with the initialization signal; a second latch for latching the data clock number data and initialized with the initialization signal; a third latch for latching the strobe signal On-time data and initialized with the initialization signal; a fourth latch for latching the print supply data and initialized with the initialization signal; print limiting means for performing print only when paper is supplied; a horizontal sync signal generator initialized when the initialization signal is input; a data clock generator for generating a data clock when the initialization signal is input; a data latch signal generator; a strobe signal generator; and a LED head for performing print after receiving print data output when paper is supplied, thereby allowing a variety of LED heads to be used.

    Abstract translation: LED头控制电路包括用于输出诸如打印开始/结束,水平同步信号周期和供纸状态之类的数据的中央控制器; 打印开始/结束控制器,用于锁存打印开始/完成数据并用初始化信号初始化; 用于锁存水平同步信号周期数据并用初始化信号初始化的第一锁存器; 第二锁存器,用于锁存数据时钟号数据并用初始化信号初始化; 第三锁存器,用于锁存选通信号准时数据并用初始化信号初始化; 用于锁存打印供应数据并用初始化信号初始化的第四锁存器; 打印限制装置,用于仅在供纸时进行打印; 在输入初始化信号时初始化的水平同步信号发生器; 数据时钟发生器,用于在输入初始化信号时产生数据时钟; 数据锁存信号发生器; 选通信号发生器; 以及用于在接收到纸张时输出的打印数据之后执行打印的LED头,从而允许使用各种LED头。

    히터를 사용한 시스템에 있어서 온도 제어회로

    公开(公告)号:KR1019930023802A

    公开(公告)日:1993-12-21

    申请号:KR1019920009196

    申请日:1992-05-28

    Inventor: 김덕수

    Abstract: 히터(80)로부터 과열온도를 감지할 수 있는 서미스터(110)를 설치하고 상기 서미스터(110)로 부터 온도 검출부(20)를 상기 히터(80)에 히터 구동부(70)를 연결하여 중앙처리장치(10)는 상기 온도 검출부(20)의 온도 검출신호를 처리하여 히터(80)의 구동 제어신호 및 상기 히터(80)의 과열시 과열상태를 식히기 위한 팬(120) 구동신호를 발생한다.

    프린터의 데이타 입출력 콘트롤러 회로
    14.
    发明授权
    프린터의 데이타 입출력 콘트롤러 회로 失效
    用于在打印机中输入和输出数据的控制器

    公开(公告)号:KR1019920006100B1

    公开(公告)日:1992-07-27

    申请号:KR1019900003837

    申请日:1990-03-21

    Inventor: 김덕수

    Abstract: The circuit includes an input/output buffer (1) for buffering inputted data and for outputting the inputted data through an external common bus. A second buffer (10) buffers various data in accordance with control signals (C2-C6), and a third buffer (20) buffers various data in accordance with control signals (C7-C13). An operation status display signal generating section (40) generates signals to display the various operation status of the system. A control signal generating section (50) generates the control signals (C1-C20) for controlling the three buffers (1)(10)(20). With the circuit, the control signals are separated, and therefore, the operation becomes simpler.

    Abstract translation: 该电路包括用于缓冲输入数据并通过外部公共总线输出输入数据的输入/输出缓冲器(1)。 第二缓冲器(10)根据控制信号(C2-C6)缓冲各种数据,第三缓冲器(20)根据控制信号(C7-C13)缓冲各种数据。 操作状态显示信号生成部(40)生成用于显示系统的各种动作状态的信号。 控制信号生成部(50)生成用于控制三个缓冲器(1)(10)(20)的控制信号(C1〜C20)。 利用电路,控制信号被分离,因此操作变得更简单。

    정지화상 송수신용 전화기 시스템
    18.
    发明授权
    정지화상 송수신용 전화기 시스템 失效
    电视接收机和电话的电话系统

    公开(公告)号:KR1019900004960B1

    公开(公告)日:1990-07-12

    申请号:KR1019860009448

    申请日:1986-11-07

    Abstract: The telephone system receives and transmits a desired still picture through the public telephone network (20) of the general telephone to efficiently process the picture data to improve the transmission ratio. The picture data signal stored in a picture memory part (11) is compressed in the picture modulating part (5) and channel modulating part (6) in transmiting part. and the data is expanded in the channel demodulating part (13) and picture demodulating part (12) in receving part.

    Abstract translation: 电话系统通过通用电话的公共电话网络(20)接收并发送期望的静止图像,以有效地处理图像数据以提高传输比。 存储在图像存储器部分(11)中的图像数据信号在图像调制部分(5)和传输部分中的信道调制部分(6)中被压缩。 并且在接收部分中的信道解调部分(13)和图像解调部分(12)中扩展数据。

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