公开(公告)号：KR1020100104734A

公开(公告)日：2010-09-29

申请号：KR1020090023350

申请日：2009-03-19

Applicant: 서울대학교산학협력단

Inventor： 황철성 ,  김경민 ,  한정환

IPC: H01G4/002 ,  H01G4/232 ,  H01G4/30

Abstract: PURPOSE: A capacitor and a manufacturing method thereof are provided to implement a capacitor with high capacitance by increasing the area of the capacitor. CONSTITUTION: A capacitor(200) comprises a substrate(210), a bottom electrode(220), a dielectric layer(230) and an upper electrode(240). A plurality of penetration holes are formed on the substrate. The diameter of the penetration hole is 0.5 to 10 um. The bottom electrode is formed on the upper surface of the substrate and the inner surface of the penetration hole. The dielectric layer is formed on the bottom electrode. A top electrode is formed on the dielectric layer. The bottom electrode, the dielectric layer and the top electrode are formed with an ALD(Atomic Layer Deposition) method.

Abstract translation: 目的：提供电容器及其制造方法，通过增加电容器的面积来实现具有高电容的电容器。 构成：电容器（200）包括衬底（210），底部电极（220），电介质层（230）和上部电极（240）。 在基板上形成多个贯通孔。 穿透孔的直径为0.5〜10μm。 底部电极形成在基板的上表面和贯通孔的内表面上。 电介质层形成在底部电极上。 在电介质层上形成顶部电极。 底部电极，电介质层和顶部电极用ALD（原子层沉积）法形成。