公开(公告)号：KR1020130047558A

公开(公告)日：2013-05-08

申请号：KR1020120073002

申请日：2012-07-04

Applicant: 한국전자통신연구원

Inventor： 김현탁 ,  김봉준 ,  최정용 ,  박종찬

IPC: H01L27/04 ,  H01L29/08 ,  H01L23/60

CPC classification number: H01L49/003

Abstract: PURPOSE: A technology for reducing ESD noise in a metal-insulator transition device and an electronic system are provided to effectively remove the static electricity of the electronic system by using a metal-insulator transition 3 terminal element. CONSTITUTION: A first semiconductor region(10) of a first conductivity functions as an outlet region. A second semiconductor region(20) of a second conductivity functions as a control region. The concentration of the second semiconductor region of the second conductivity has the moat critical concentration of the upper part of the first semiconductor region of the first conductivity. A third semiconductor region(30) of the first conductivity functions as an inlet region. An MIT 3 terminal element consists of three terminals(12,22,32) for an inlet(I), an outlet(O), and a control(C).

Abstract translation: 目的：提供一种用于减少金属 - 绝缘体转换装置和电子系统中的ESD噪声的技术，以通过使用金属 - 绝缘体转换3端子元件来有效地去除电子系统的静电。 构成：第一导电性的第一半导体区域（10）用作出口区域。 具有第二导电性的第二半导体区域（20）用作控制区域。 第二导电性的第二半导体区域的浓度具有第一导电率的第一半导体区域的上部的护城河临界浓度。 第一导电性的第三半导体区域（30）用作入口区域。 MIT 3端子元件由用于入口（I），出口（O）和控制（C）的三个端子（12,22,32）组成。

公开(公告)号：KR1020110079979A

公开(公告)日：2011-07-12

申请号：KR1020100000106

申请日：2010-01-04

Applicant: 한국전자통신연구원

Inventor： 김현탁 ,  최성열 ,  최정용 ,  김봉준

IPC: H01L33/04

CPC classification number: H01L33/0008 ,  H01L33/0075 ,  H01L33/04 ,  H01L33/12 ,  H01L33/42 ,  H01L33/60 ,  H01L2924/12041

Abstract: PURPOSE: A structure of a light emitting device using an avalanche metal-insulator transition phenomenon in a semiconductor is provided to enhance a yield rate by reducing the number of layers in a thin film and simplifying a light emitting device manufacturing process. CONSTITUTION: A semiconductor layer in which a light emission occurs in an avalanche domain is included. A buffer layer is formed on a substrate. A P type or a N type semiconductor layer is formed on the buffer layer. The first electrode layer is formed under the semiconductor layer or within the semiconductor layer. The second electrode layer is formed on the semiconductor layer.

Abstract translation: 目的：提供一种在半导体中使用雪崩金属 - 绝缘体转变现象的发光器件的结构，以通过减少薄膜中的层数来提高成品率，并简化了发光器件制造工艺。 构成：包括在雪崩域中发生发光的半导体层。 在基板上形成缓冲层。 在缓冲层上形成P型或N型半导体层。 第一电极层形成在半导体层之下或半导体层内。 第二电极层形成在半导体层上。