公开(公告)号：JPS59181726A

公开(公告)日：1984-10-16

申请号：JP5650383

申请日：1983-03-30

Applicant: Advantest Corp

Inventor： KURIHARA TAKENORI

IPC: H03L7/18 ,  H03L7/183 ,  H03L7/22

CPC classification number: H03L7/183

Abstract: PURPOSE:To simplify a device by constituting said device so that the loop gain of the first PLL consisting of a variable frequency generating means - the first phase comparator is larger than that of the second PLL consisting of a variable frequency oscillating means - a variable frequency divider - the second phase comparator, and selecting narrowly a leading-in range. CONSTITUTION:Signal generators 13, 15 output reference signals of f1, f2 by setting devices 25, 26, respectively. When frequencies of VCOs 11, 28 are denoted as fo and fs, respectively, the VCO11 is controlled so as to become fo=N.fs by a PLL31. In this case, a PLL23 constitutes a closed loop, and the VCO11 is controlled so as to become fo=f1+f2 by the PLL23. fo=N.fsnot equal to f1+f2 until both the PLLs become a synchronizing state completely, and since the gain of the PLL23 is larger than that of the PLL31, an error voltage is generated from a phase comparator 14 so as to become fo=f1+f2, both the VCOs 11, 28 are controlled, fo=f1+f2=N.fs is attained, and an initial error of N.fs by the PLL31 and f1+f2 by the PLL23 enters into a leading-in range. That is to say, N.fs+ or - (f1+f2) becomes smaller than the leading-in range of the PLL23.

Abstract translation: 目的：通过构成所述装置来简化装置，使得由可变频率发生装置组成的第一PLL的环路增益 - 第一相位比较器大于由可变频率振荡装置组成的第二PLL的环路增益 - 可变频率 分频器 - 第二相位比较器，并选择狭窄的导入范围。 构成：信号发生器13,15分别通过设置装置25,26输出f1，f2的参考信号。 当VCO11,28的频率分别表示为fo和fs时，PLL11被控制成通过PLL31成为fo = N.fs。 在这种情况下，PLL23构成闭环，VCO11被PLL23控制成为fo = f1 + f2。 fo = N.fs不等于f1 + f2，直到PLL完全变为同步状态，并且由于PLL23的增益大于PLL31的增益，所以从相位比较器14产生误差电压成为fo = f1 + f2，VCO11,28都被控制，得到fo = f1 + f2 = N.fs，并且PLL23的PLL31和f1 + f2的初始误差N.fs进入导入 范围。 也就是说，N.fs +或 - （f1 + f2）变得小于PLL23的导入范围。

公开(公告)号：JPS59122961A

公开(公告)日：1984-07-16

申请号：JP23330082

申请日：1982-12-28

Applicant: Advantest Corp

Inventor： KURIHARA TAKENORI

IPC: G01R23/173 ,  G01R29/26 ,  H03B23/00

Abstract: PURPOSE: To obtain a spectrum analyzer reduced in phase noise, by a method wherein a local oscillator is formed of a frequency dividing circuit using a phase synchronous circuit and a variable frequency oscillator and a spectrum is formed by mixing the output and input signal thereof.
CONSTITUTION: A frequency divider 29 is formed of a frequency setting device 38 for generating pre-tuning voltage in response to the sweep saw tooth signal of CRT27, a voltage control oscillator 31 for outputting a signal with frequency corresponding to said frequency setting device 38, a multiplier 34 for multiplying the output of the oscillator 31 and a phase synchronous circuit such as a phase comparator 33 for performing the feed-back control of the oscillator 31 by comparing the phase of the output of a variable frequency oscillator 28 and the output of the multiplier 34. A local oscillation circuit low in noise is constituted of the frequency divider 29 and the oscillator 28 and local oscillation output low in noise is mixed with the input signal of a mixer 13 to form a spectrum. As a result, a spectrum analyser low in phase noise not only in the vicinity of oscillation frequency but also in a remotely separated place is obtained.
COPYRIGHT: (C)1984,JPO&Japio

Abstract translation: 目的：通过使用相位同步电路和可变频率振荡器的分频电路形成本地振荡器的方法来获得减少相位噪声的频谱分析仪，并且通过混合其输出和输入信号来形成频谱。 构成：分频器29由频率设定装置38形成，用于响应于CRT27的扫描锯齿信号产生预调电压，用于输出频率对应于频率设定装置38的频率的电压控制振荡器31， 用于将振荡器31的输出和相位比较器33的相位同步电路相乘的乘法器34，用于通过比较可变频率振荡器28的输出的相位和振荡器31的输出的输出来执行振荡器31的反馈控制 低频噪声的本地振荡电路由分频器29和振荡器28构成，噪声中的本地振荡输出与混频器13的输入信号混合形成频谱。 结果，获得了不仅在振荡频率附近而且在远程分离的地方都具有低相位噪声的频谱分析仪。

公开(公告)号：JPH0257366B2

公开(公告)日：1990-12-04

申请号：JP14167684

申请日：1984-07-09

Applicant: ADVANTEST CORP

Inventor： KURIHARA TAKENORI

IPC: H03C1/12

公开(公告)号：JPS6350210A

公开(公告)日：1988-03-03

申请号：JP19445486

申请日：1986-08-20

Applicant: ADVANTEST CORP

Inventor： KURIHARA TAKENORI

IPC: H03G3/30 ,  H03L7/08

Abstract: PURPOSE:To eliminate the noise due to spectrum spread, etc., generated for switching of a frequency or an amplitude by providing a circuit which detects the change of the frequency or the amplitude of an input signal and releasing lock state of an automatic level control circuit when this change is detected and sufficiently attenuating the level of an outputted signal and returning it to the original state again thereafter. CONSTITUTION:The AC signal outputted from a variable frequency oscillator 18 is attenuated by a variable attenuator 29 and is amplified by an amplifier 30 and is outputted from a terminal 38. The output signal of a phase comparator 19 constituting a phase synchronizing circuit is supplied to a transient detector 21 also. When the frequency or the amplitude of the AC signal outputted from the terminal 38 is changed, the transient detector 21 momently opens a switch 35. A switch 36 is closed to increase the extent of attenuation of the variable attenuator 29, and the level of the signal outputted from the terminal 38 is sufficiently attenuated. Consequently, malfunction does not occur in a measurer or the like connected to the succeeding stage of a transient level suppressing circuit even if the signal is switched, and switching is quickly performed.

公开(公告)号：JPS6338329A

公开(公告)日：1988-02-18

申请号：JP18256886

申请日：1986-08-02

Applicant: ADVANTEST CORP

Inventor： KURIHARA TAKENORI

IPC: H03L7/22

Abstract: PURPOSE:To obtain a microwave synthesizer which excels in the noise characteristics at a low cost by using two phase lock loops PLL consisting of voltage controlled oscillators, variable dividers and phase detectors, a frequency converting means, etc. CONSTITUTION:The 1st phase lock loop PLL consists of a voltage control microwave oscillator 11 which oscillates at a microfrequency band, the 1st variable divider 12 which divides the oscillation output frequency of the oscillator 11 into desired levels and the 1st phase detector 13 which detects the phase difference between the dividing output of the divider 12 and a reference signal. While the 2nd PLL includes a voltage control oscillator 17 which oscillates the frequency bands of VHF, HF, etc., the 2nd variable divider 16 and the 2nd phase detector 15. Furthermore, the 3rd variable divider 18 is added together with a frequency converting means which supplies a converted signal to the detector 13 as a reference signal. Then the dividing ratios of both dividers 12 and 18 are set at the same value at the same time point in order to obtain a desired microwave signal. Thus it is possible to produce this microwave synthesizer by means of a digital IC generally put on the market and therefore to reduce the cost of production.

公开(公告)号：JPS6314503A

公开(公告)日：1988-01-21

申请号：JP15948986

申请日：1986-07-07

Applicant: ADVANTEST CORP

Inventor： KURIHARA TAKENORI

IPC: H03B23/00

Abstract: PURPOSE:To reduce the frequency skip and the sweep period by controlling the frequency of a VCO in response to a maximum sweep frequency, a start frequency and a stop frequency. CONSTITUTION:In case of the relation of start frequency fst fmax/2, the frequency fv increase linearly from the frequency fst to the frequency fsp over the period T and the frequency fv is selected over all the periods. In case of fsp

公开(公告)号：JPH0522402B2

公开(公告)日：1993-03-29

申请号：JP13189279

申请日：1979-10-15

Applicant: ADVANTEST CORP

Inventor： KURIHARA TAKENORI

IPC: H03K4/08 ,  H03B23/00

公开(公告)号：JPH0325097B2

公开(公告)日：1991-04-05

申请号：JP24279084

申请日：1984-11-16

Applicant: ADVANTEST CORP

Inventor： KURIHARA TAKENORI

IPC: H03L7/197 ,  H03L7/18

公开(公告)号：JPH02143736A

公开(公告)日：1990-06-01

申请号：JP29859088

申请日：1988-11-25

Applicant: ADVANTEST CORP

Inventor： KURIHARA TAKENORI ,  KITAI AKIRA

IPC: H04B17/00 ,  H04B17/15 ,  H04B17/29

Abstract: PURPOSE:To test a transmitter and a receiver at a time by selecting properly a difference between a 1st offset frequency and a 2nd offset frequency and selecting optionally the difference between a transmission frequency and a reception frequency. CONSTITUTION:A difference is given to a frequency for a transmitter Tx and a receiver Rx by a frequency difference (f4-f5) between a 1st offset signal oscillator 104A and a 2nd offset signal oscillator 105A. A optional frequency difference is given to the frequency difference (f4-f5) by selecting properly the oscillated frequencies f5, f4 of the 1st offset signal oscillator 104A and the 2nd offset signal oscillator 105A. Then a transmitter Tx to be tested is connected to an input terminal IN and a receiver Rx to be tested is connected to an output terminal OUT. Thus, the test is conducted by operating both the transmitter Tx and the receiver Rx simultaneously.

公开(公告)号：JPS62183007A

公开(公告)日：1987-08-11

申请号：JP2363086

申请日：1986-02-05

Applicant: ADVANTEST CORP ,  JAPAN BROADCASTING CORP

Inventor： KURIHARA TAKENORI ,  KAMIJO KOJI

IPC: H04N17/06 ,  G11B5/00 ,  G11B5/027

Abstract: PURPOSE:To measure simply the FM transmission characteristic in a short time by applying sweeping by a sweep start signal by a prescribed time after a timing signal applied after a program search signal changes suddenly synchronously each intermittent signal. CONSTITUTION:A measuring object 11 gives a reproducing signal to a spectrum analyzer (SA) 10 via a branching filter 21 and also the signal to an envelope detector 22 and a mark detector 23. The envelope signal from the detector 22 and a program search signal from a detector 24 is inputted to a sweep control circuit 24 as a measuring start signal. The sweep start signal is generated after a prescribed time from the leading of the envelope signal from the circuit 24 after the measuring start signal is applied thereto and the signal is fed to a sweep voltage generator 19. The sweep voltage generator 19 generates a sweep signal and the result of measurement is displayed on a cathode ray tube 17. The sweep voltage generating circuit 19 uses the sweep start signal given after one sweep and a blanking time end to start the next sweep. The processing above is repeated to display a reproducing FM signal inputted to the SA 10 continuously.