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公开(公告)号：DE3584491D1
公开(公告)日：1991-11-28
申请号：DE3584491
申请日：1985-08-20
Applicant: ADVANTEST CORP
Inventor： KURIHARA TAKENORI
Abstract: A reference signal from a reference signal source (11) is supplied to frequency transforming means (12) and side band signal generating means (49). The frequency transforming means is formed mainly by up-converters and produces a frequency m times as high as the frequency f s of the reference signal. The side band signal generating means outputs signals of base and harmonic frequencies f . , 2f s , 3f s , ... and nf. (where n is greater than m) and produces less phase noise than does the frequency transforming means. The outputs of the frequency transforming means and the side band signal generating means are frequency mixed by frequency mixing means (15), and one frequency component in the frequency-mixed output is selected by a variable filter (16).
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公开(公告)号：JPS62272702A
公开(公告)日：1987-11-26
申请号：JP11687686
申请日：1986-05-21
Applicant: ADVANTEST CORP
Inventor： KURIHARA TAKENORI
IPC: H03C3/00
Abstract: PURPOSE:To prevent the FM modulation distortion or the asymmetricity of FM modulation by using a voltage controlled oscillator and generating a frequency modulation signal around a prescribed carrier frequency so as to apply frequency mixing to the carrier whose frequency is changed within a desired frequency range. CONSTITUTION:An FM modulator 11 consists of a VCO. The self-running oscillation frequency is selected so as to be matched to a portion C having an excellent linearity in the control voltage Vr versus oscillation frequency fout of the VCO. A low-pass filter 18 is provided at the output side of the 1st mixer 14 to extract a signal Sff having a frequency component of (f2-f1). The signal Sff is inputted to a modulation signal eliminating means 15, where the FM modulation component is eliminated. The 2nd mixer 16 applies frequency mixing to an FM modulation signal SFM divided by a signal distributor 12 and an output signal of the modulation signal eliminating means 15 and a low-pass filter 17 extracts the difference frequency component f2-(f2-f1). Thus, the FM modulation signal whose carrier frequency is set freely within a prescribed frequency range is obtained.
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公开(公告)号：JPS59173803A
公开(公告)日：1984-10-02
申请号：JP4829583
申请日：1983-03-22
Applicant: Advantest Corp
Inventor： HEISHIYA YOUHEI , NUKUI YOSHIHIRO , KURIHARA TAKENORI
IPC: G05B15/02
CPC classification number: G05B19/0425 , G05B2219/24015
Abstract: PURPOSE:To simplify the constitution of a system by providing respective apparatuses of the system with simple control devices for I/O controlling and receiving and transferring data from/to the control parts of the apparatuses. CONSTITUTION:An electronic apparatus 2 provided with an I/O control device 15 is connected to an interface (I/O) 11 to monitor and control the I/O of a control part 12. In the I/O control device 15, a signal monitoring means 16 always monitors a signal on a bus line of the I/O 11 and an I/O control means 18 controls the control part 12 by said monitoring information to receive and transfer the signal. The control part 12 controls the operation of a working part 14 on the basis of original setting part 13 and also controls the I/O of a signal and an arithmetic means 17 calculating data or the like to be outputted by a command from an I/O control means 18.
Abstract translation: 目的：为了简化系统的结构，通过为系统的各个装置提供简单的控制装置，用于I / O控制和接收和传送数据到设备的控制部分。 构成：设置有I / O控制装置15的电子设备2连接到接口（I / O）11，以监视和控制控制部分12的I / O。在I / O控制装置15中， 信号监视装置16总是监视I / O 11的总线上的信号，并且I / O控制装置18通过所述监视信息控制控制部分12以接收和传送信号。 控制部分12基于原始设置部分13控制工作部分14的操作，并且还控制信号的I / O和计算数据等的运算装置17，以通过来自I / O控制装置18。
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公开(公告)号：JPS598410A
公开(公告)日：1984-01-17
申请号：JP11732882
申请日：1982-07-05
Applicant: Advantest Corp
Inventor： KURIHARA TAKENORI , HEISHIYA YOUHEI , TOUJIYOU SHIGEKI
CPC classification number: H03B23/00 , H03B2200/0092 , H03B2201/0241
Abstract: PURPOSE: To set a sweep start and a sweep end frequency of a frequency sweep range in advance and to set accurately the set frequency range, by changing respectively an attenuation of the 1st and the 2nd set means.
CONSTITUTION: The sweep end voltage is set to an optional value in the range of 0∼+E by changing the attenuation of the 1st set means 3. Further, the sweep start voltage is set to an optional value in the range of 0∼+E by changing the attenuation of the 2nd set means 3. Thus, the sweep start and the sweep end frequency of a voltage controlled oscillator VCO7 are set accurately to an optional frequency of the sweep range of the VCO7 by setting suitably the set conditions of the 1st and the 2nd set means 3, 4.
COPYRIGHT: (C)1984,JPO&JapioAbstract translation: 目的：提前设置频率扫描范围的扫描起始频率和扫频结束频率，并通过分别改变第1和第2设定装置的衰减来精确设置设定的频率范围。 构成：通过改变第1设定装置3的衰减，将扫描结束电压设置在0- + E范围内的可选值。此外，扫描启动电压设置为0- + E通过改变第二设定装置3的衰减。因此，压控振荡器VCO7的扫描开始和扫描结束频率被精确地设置到VCO7的扫描范围的任选频率，通过适当地设定 第1和第2集意味着3,4。
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公开(公告)号：JPS57125528A
公开(公告)日：1982-08-04
申请号：JP1124781
申请日：1981-01-28
Applicant: Advantest Corp
Inventor： KURIHARA TAKENORI
CPC classification number: H03L7/23 , Y10S331/02
Abstract: PURPOSE: To make a titled devive synchronous easily even with deteriorated linearity of a VCO and to enable the acquisition of synchronism over a wide range, by providing the 2nd phase synchronizing loop with wider acquisition range than that of the 1st phase synchronizing loop.
CONSTITUTION: An output of a frequency generator 12 and that of a frequency generator 27 are frequency-mixed at a frequency mixer 29. A signal having the frequency sum between an output frequency f
2 of the generator 12 and that f
1 of the generator 27 is picked up from the SSB mixer 29. The 2nd phase synchronizing loop 31 which performs control to a VCO 11 taking this signal as a reference is employed. C/N can be increased by a loop gain G
1 by this PLL31 and when the 1st phase synchronizing loop 17 is locked, the value is further improved by a gain G
2 . If the lock in range on synchronization of the PLL 17 is exceeded, the acquisition operation of the PLL 31 is done, the acquisition with wider range can be made.
COPYRIGHT: (C)1982,JPO&JapioAbstract translation: 目的：通过提供具有比第一相位同步回路更宽的采集范围的第二相位同步回路，即使在VCO的线性度降低的情况下，也能轻松实现标题偏差，并且能够在宽范围内获取同步。 构成：频率发生器12的输出和频率发生器27的输出在频率混合器29被频率混合。在发生器12的输出频率f2和发生器27的f1之间具有频率和的信号被拾取 采用从SSB混频器29提取的信号。采用以该信号为参考对VCO11进行控制的第二相位同步环路31。 C / N可以通过该PLL31的环路增益G1增加，并且当第一相位同步环路17被锁定时，通过增益G2进一步改善该值。 如果超过PLL 17的同步锁定范围，则完成PLL 31的采集操作，可以进行更宽范围的采集。
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Patent Agency Ranking
公开(公告)号：JPH0584562B2
公开(公告)日：1993-12-02
申请号：JP2363086
申请日：1986-02-05
Applicant: ADVANTEST CORP , JAPAN BROADCASTING CORP
Inventor： KURIHARA TAKENORI , KAMIJO KOJI
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公开(公告)号：JPH0237817A
公开(公告)日：1990-02-07
申请号：JP18890088
申请日：1988-07-28
Applicant: ADVANTEST CORP
Inventor： KURIHARA TAKENORI
Abstract: PURPOSE:To set a delay time in a wide range by frequency-synthesizing a signal that an output signal of a local oscillator which passes through a programmable delay generator and a transmitting signal are frequency- synthesized and a direct output signal from the local oscillator again and restore it to the same frequency as former transmitting signal. CONSTITUTION:The transmitting signal is supplied to one input side of a first mixer 18 through an input terminal 14 and the output signal of a first local oscillator 16 is supplied to the other input side through a programmable delay generator 17. The signal frequency-synthesized by the first mixer 18 is supplied one input side of a second mixer 20 through a first filter 19 and the output signal of the first local oscillator 16 is supplied to the other input. The signal frequency-synthesized by the second mixer 20 is outputted through a second filter 21 and an output signal 15. The oscillating frequency of the first local oscillator 16 and the delay time of the programmable delay generator 17 are adjusted in the range where the circuit operates normally. Thus, the delay time can be set over the wide range.
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公开(公告)号：JPH0235807A
公开(公告)日：1990-02-06
申请号：JP16646488
申请日：1988-07-04
Applicant: ADVANTEST CORP
Inventor： KURIHARA TAKENORI
IPC: H03C3/00
Abstract: PURPOSE:To obtain a device in which a frequency change is constant over a wide band and high in spectrum purity by using the part of the good linearity of the V-F characteristic of a voltage control oscillator, executing the frequency modulation and supplying the modulating signal through a multiplier to a phase synchronizing loop. CONSTITUTION:By the V-F characteristic of a first voltage controlled oscillator 31, a part with a good linearity is selected, a modulated signal is added to a voltage corresponding to the carrier frequency by an adder 26 and supplied to the first voltage controlled oscillator 31. The frequency modulated signal is frequency-multiplied with a multiplier 34. At this time, the frequency change of the modulated signal superimposed by the high harmonic signal in which the multiplying degree is (m)-fold becomes also (m)-fold. For this reason, in accordance with a multiplying degree (m) of a high harmonic signal selected by a signal supplied from an input terminal 41, the amplification factor of the modulated signal by a change adjuster 23 becomes for example n/m. At this time, regardless of the selected high harmonic signal, the frequency change of the modulated signal superimposed to the high harmonic signal is constant. In order to interpolate the section between the carrier frequencies of the discrete high harmonic signal, a variable frequency oscillator 39 to generate a sine wave signal is provided.
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公开(公告)号：JPH01309516A
公开(公告)日：1989-12-13
申请号：JP14077788
申请日：1988-06-08
Applicant: ADVANTEST CORP
Inventor： KURIHARA TAKENORI
Abstract: PURPOSE:To realize a frequency synthesizer with inexpensive configuration and high resolution by controlling the oscillated frequency of a 1st voltage controlled oscillator in a double loop comprising 1st and 2nd phase locked loops and providing a 3rd phase locked loop and a 2nd frequency converter converting the frequency of an output signal. CONSTITUTION:An output signal of the 1st voltage controlled oscillator 24 is controlled by two phase locked loops 35, 40 and a signal with low noise is outputted from the 1st voltage controlled oscillator 24. Moreover, the variable frequency oscillator 26 consists of the 3rd phase locked loop 45 comprising the 2nd voltage controlled oscillator 41, the 2nd variable frequency divider 42 and the 3rd phase/frequency comparator 43 and a 2nd frequency divider 46 frequency-dividing the output signal of the 3rd phase locked loop 45 and supplying the result to a 90 deg. shifter 27. Thus, the noise component included in the signal outputted from the 3rd phase locked loop 45 is reduced by the frequency divider 46. Furthermore, the signal frequency outputted from the 1st voltage controlled oscillator 24 is adjusted by the 1st variable frequency divider 31 and the 2nd variable frequency divider 42. Thus, the frequency synthesizer with high resolution and low cost is obtained.
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公开(公告)号：JPS61295703A
公开(公告)日：1986-12-26
申请号：JP13747985
申请日：1985-06-24
Applicant: ADVANTEST CORP
Inventor： KURIHARA TAKENORI
Abstract: PURPOSE:To measure the level of a signal of desired frequency and levels of a near by spurious signal and noise generation respectively accurately by amplifying a single-frequency signal and adjusting the signal so that the signal is opposite in phase from the desired frequency signal and equal in level, and mixing those signals by an electric power coupler and removing the signal of desired frequency from a signal to be measured. CONSTITUTION:The signal-frequency signal 23 is converted by a phase adjusting means 16 into a signal 25 opposite in phase from the desired frequency signal 3. Then, a level adjusting means 19 adjusts signals 3 and 25 in the signal 4 to be measured to the same level, so that the signals 3 and 25 cancel each other in the electric power coupler 22. For the purpose, the signal obtained by suppressing the signal 3 in the signal 4 to be measured is supplied to a measuring instrument 5 such as a spectrum analyzer to prevent the dynamic range of the measuring instrument 5 from being disturbed by the signal 3 having a large level, so that a noises N, spurious signals SP1 and SP2, high frequencies 3A and 3B, etc., are displayed large.
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