公开(公告)号：WO2013163323A1

公开(公告)日：2013-10-31

申请号：PCT/US2013/038034

申请日：2013-04-24

Applicant: APPLIED MATERIALS, INC.

Inventor： ZHU, Mingwei ,  WANG, Rongjun ,  PATIBANDLA, Nag, B. ,  TANG, Xianmin ,  AGRAWAL, Vivek ,  TSAI, Cheng-Hsiung, Matthew ,  RASHEED, Muhammad ,  SAIGAL, Dinesh ,  RAJA, Praburam Gopal ,  NALAMASU, Omkaram ,  SUBRAMANI, Anantha

IPC: H01L21/203 ,  H01L33/02 ,  H01L33/12

CPC classification number: H01L33/12 ,  C30B23/02 ,  C30B29/403 ,  H01L21/0237 ,  H01L21/02439 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02631 ,  H01L21/02661 ,  H01L29/205 ,  H01L33/007 ,  H01L33/06 ,  H01L33/32

Abstract: Fabrication of gallium nitride-based light devices with physical vapor deposition (PVD)-formed aluminum nitride buffer layers is described. Process conditions for a PVD AlN buffer layer are also described. Substrate pretreatments for a PVD aluminum nitride buffer layer are also described. In an example, a method of fabricating a buffer layer above a substrate involves pre-treating a surface of a substrate. The method also involves, subsequently, reactive sputtering an aluminum nitride (AlN) layer on the surface of the substrate from an aluminum-containing target housed in a physical vapor deposition (PVD) chamber with a nitrogen-based gas or plasma.

Abstract translation: 描述了具有物理气相沉积（PVD）形成的氮化铝缓冲层的氮化镓基光器件的制造。 还描述了PVD AlN缓冲层的工艺条件。 还描述了PVD氮化铝缓冲层的基板预处理。 在一个实例中，在衬底上制造缓冲层的方法包括预处理衬底的表面。 该方法还涉及从容纳在具有氮基气体或等离子体的物理气相沉积（PVD）室中的含铝靶材反应溅射基板表面上的氮化铝（AlN）层。

公开(公告)号：WO2012057987A2

公开(公告)日：2012-05-03

申请号：PCT/US2011/055374

申请日：2011-10-07

Applicant: APPLIED MATERIALS, INC. ,  RASHEED, Muhammad ,  MILLER, Keith A. ,  WANG, Rongjun

Inventor： RASHEED, Muhammad ,  MILLER, Keith A. ,  WANG, Rongjun

IPC: H01L21/203 ,  H01L21/683

CPC classification number: C23C14/50 ,  C23C14/3407 ,  C23C14/564 ,  C23C16/4585 ,  H01L21/68735

Abstract: Embodiments of the invention generally relate to a process kit for a semiconductor processing chamber, and a semiconductor processing chamber having a kit. More specifically, embodiments described herein relate to a process kit including a deposition ring and a pedestal assembly. The components of the process kit work alone, and in combination, to significantly reduce their effects on the electric fields around a substrate during processing.

Abstract translation: 本发明的实施例一般涉及用于半导体处理室的处理套件和具有套件的半导体处理室。 更具体地说，这里描述的实施例涉及包括沉积环和基座组件的处理套件。 该工艺套件的组件独自工作，并结合使用，显着降低其在加工过程中对衬底周围电场的影响。

公开(公告)号：WO2012015993A3

公开(公告)日：2012-02-02

申请号：PCT/US2011/045644

申请日：2011-07-28

Applicant: APPLIED MATERIALS, INC. ,  LIU, Zhendong ,  CAO, Yong ,  TANG, Xianmin ,  GANDIKOTA, Srinivas ,  NGUYEN, Thanh ,  RASHEED, Muhammad

Inventor： LIU, Zhendong ,  CAO, Yong ,  TANG, Xianmin ,  GANDIKOTA, Srinivas ,  NGUYEN, Thanh ,  RASHEED, Muhammad

IPC: H01L21/203 ,  C23C14/35

Abstract: Methods and apparatus for depositing thin films having high thickness uniformity and low resistivity are provided herein. In some embodiments, a magnetron assembly includes a shunt plate, the shunt plate rotatable about an axis, an inner closed loop magnetic pole coupled to the shunt plate, and an outer closed loop magnetic pole coupled the shunt plate, wherein an unbalance ratio of a magnetic field strength of the outer closed loop magnetic pole to a magnetic field strength of the inner closed loop magnetic pole is less than about 1. In some embodiments, the ratio is about 0.57. In some embodiments, the shunt plate and the outer close loop magnetic pole have a cardioid shape. A method utilizing RF and DC power in combination with the inventive magnetron assembly is also disclosed.