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公开(公告)号：US10326376B2
公开(公告)日：2019-06-18
申请号：US15840154
申请日：2017-12-13
Applicant: Apple Inc.
Inventor： Bogdan T. Bucheru
Abstract: A current fed active clamp forward boost (CAFB) converter can include a primary coil coupled to an input voltage and a main switch, an input choke serially coupled with the primary coil, and a clamp switch coupled to the primary coil, input choke, and a clamp capacitor. The main switch may operate to regulate an output voltage of the converter. The clamp switch may operate alternately with respect to the main switch, and the auxiliary switch may selectively couple a DC bus voltage to the primary coil. The converter can be operated in a CAFB mode if the input voltage is greater than the boost voltage threshold or in a current fed active clamp forward (CAF) mode if the input voltage is not greater than the boost voltage threshold.
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公开(公告)号：US10320194B2
公开(公告)日：2019-06-11
申请号：US15850752
申请日：2017-12-21
Applicant: Apple Inc.
Inventor： Zaohong Yang , Bogdan T. Bucheru
Abstract: Disclosed herein are a system, method and non-transitory program storage device that are intended to provide a control system with quick response for a multi-level power converter. The control system may regulate an output voltage of the power converter based on one or more feedback signals. The feedback signals may be generated based on a differential between the output voltage and a reference voltage. The control system may further include one or more feed-forward signals representative of either the output voltage or transients of the output voltage. The control system may further include one or more switches in parallel with the one or more capacitors to selectively enable and/or disable direct feed-forward and capacitive feed-forward responsive to the output voltage at different levels.
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公开(公告)号：US10243453B1
公开(公告)日：2019-03-26
申请号：US15847173
申请日：2017-12-19
Applicant: Apple Inc.
Inventor： Joao L. Andres , Bogdan T. Bucheru
Abstract: This disclosure describes a circuit, a method, and a system to mitigate common mode noise in a power converter. The converter may include a transformer that isolates input and output terminals with primary and secondary windings. The transformer may further include an auxiliary winding coupled in anti-parallel with a secondary winding. The auxiliary winding may inject a common mode current through a compensation capacitor and a Y-capacitor to cancel a common mode current induced at the secondary side to the primary side. The converter may include a coupler circuit that provides a varying impedance at different frequencies to facilitate the current injection and allocate voltages between the compensation capacitor and the Y-capacitor. A voltage clamping circuit may be employed to protect a coupler capacitor from overvoltage.
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公开(公告)号：US09977475B2
公开(公告)日：2018-05-22
申请号：US14831682
申请日：2015-08-20
Applicant: Apple Inc.
Inventor： InHwan Oh , Marco Soldano , Nicholas A. Sims , Manisha P. Pandya , Bogdan T. Bucheru
CPC classification number: G06F1/26
Abstract: An electronic device has an I/O port, a bus connector and a transistor that is connected between the I/O port and a communications contact of the bus connector. A control circuit is connected to the transistor to maintain a gate voltage of the transistor independent of power supply voltage on a power supply contact of the connector. Other embodiments are also described and claimed.
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公开(公告)号：US20240039398A1
公开(公告)日：2024-02-01
申请号：US17814902
申请日：2022-07-26
Applicant: Apple Inc.
Inventor： Bogdan T. Bucheru , Joao L. Andres , Marco A. Davila, JR.
CPC classification number: H02M1/4225 , H02M3/33507 , H02M1/0095 , H02M1/0032
Abstract: A power converter can include an input PFC stage that receives a rectified input voltage coupled to a flyback stage including a center-tapped primary winding magnetically coupled to a secondary winding and a main switch coupled in series with the primary winding. The output of the PFC stage can be coupled to the center tap of the primary winding, and an output of the power converter can be coupled to the secondary winding of the flyback stage. The converter can further include control circuitry coupled to the main switch and an auxiliary switch in the PFC stage that operates the main switch to regulate an output voltage of the power converter, selectively enables the auxiliary switch responsive to a low line voltage condition at the input of the power converter, and operates the enabled auxiliary switch synchronously with the main switch.
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Patent Agency Ranking
公开(公告)号：US20230081556A1
公开(公告)日：2023-03-16
申请号：US17477286
申请日：2021-09-16
Applicant: Apple Inc.
Inventor： Bogdan T. Bucheru
IPC: G01N29/34 , G06F3/01 , G01F1/66 , G01N29/024
Abstract: An electronic device may include air input sensors that gather air input from a user's fingers, a stylus, or other object in a volume of air near the electronic device. The air input sensors may include ultrasonic transducers that emit ultrasonic signals towards the volume of air and that detect the ultrasonic signals after the signals reflect from the external object. Using time-of-flight measurement techniques, control circuitry may track the movement of the external object in the volume of air near the electronic device. A display may provide visual feedback of the air input, such as shadows that preview where the input will be directed to on the display. The volume of air where input is detected may be divided into multiple input zones that trigger different actions from the electronic device. The ultrasonic transducers may include acoustic lenses.
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公开(公告)号：US20200274454A1
公开(公告)日：2020-08-27
申请号：US16420965
申请日：2019-05-23
Applicant: Apple Inc.
Inventor： Bogdan T. Bucheru
Abstract: A direct feedback isolated power converter can include a transformer with primary, secondary, and bias windings. A main switch can selectively enable and disable current flow through the primary winding. A controller coupled to the bias winding may be configured to generate a gate drive signal for the main switch responsive at least in part to free ringing of the transformer. The controller may detect the free ringing via the bias winding. An auxiliary switch coupled across the secondary winding may be configured to selectively short circuit the secondary winding, responsive to feedback circuitry, to control when free ringing is established. The feedback circuitry may include a proportional, proportional integral, or proportional-integral-derivative control loop, a hysteretic control loop, or other controller type. The controller may operate at a variable or fixed frequency. The direct feedback isolated power converter may be a flyback converter or other type of isolated converter.
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公开(公告)号：US20190222113A1
公开(公告)日：2019-07-18
申请号：US16365100
申请日：2019-03-26
Applicant: Apple Inc.
Inventor： Marco A. Davila , Joao L. Andres , Bogdan T. Bucheru , Vijay Phadke
Abstract: This disclosure describes a flyback converter with a series-parallel mode (SPM) active clamp. The active clamp, coupled in parallel with the primary coil, may include a clamp switch, two or more snubber capacitors, and associated diodes. The active clamp may be configured to absorb and retain the leakage energy from the leakage inductance of the flyback converter. The clamp switch may be turned on selectively as the primary switch approaches one of a plurality peak values to adjust frequencies of the switching devices. With the active clamp circuit, the flyback converter may first re-capture the leakage energy in the active clamp circuit and then recover it back to the power source.
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公开(公告)号：US20190097539A1
公开(公告)日：2019-03-28
申请号：US15840154
申请日：2017-12-13
Applicant: Apple Inc.
Inventor： Bogdan T. Bucheru
Abstract: A current fed active clamp forward boost (CAFB) converter can include a primary coil coupled to an input voltage and a main switch, an input choke serially coupled with the primary coil, and a clamp switch coupled to the primary coil, input choke, and a clamp capacitor. The main switch may operate to regulate an output voltage of the converter. The clamp switch may operate alternately with respect to the main switch, and the auxiliary switch may selectively couple a DC bus voltage to the primary coil. The converter can be operated in a CAFB mode if the input voltage is greater than the boost voltage threshold or in a current fed active clamp forward (CAF) mode if the input voltage is not greater than the boost voltage threshold.
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公开(公告)号：US20190097530A1
公开(公告)日：2019-03-28
申请号：US15847173
申请日：2017-12-19
Applicant: Apple Inc.
Inventor： Joao L. Andres , Bogdan T. Bucheru
Abstract: This disclosure describes a circuit, a method, and a system to mitigate common mode noise in a power converter. The converter may include a transformer that isolates input and output terminals with primary and secondary windings. The transformer may further include an auxiliary winding coupled in anti-parallel with a secondary winding. The auxiliary winding may inject a common mode current through a compensation capacitor and a Y-capacitor to cancel a common mode current induced at the secondary side to the primary side. The converter may include a coupler circuit that provides a varying impedance at different frequencies to facilitate the current injection and allocate voltages between the compensation capacitor and the Y-capacitor. A voltage clamping circuit may be employed to protect a coupler capacitor from overvoltage.
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