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公开(公告)号：US10770965B2
公开(公告)日：2020-09-08
申请号：US16365100
申请日：2019-03-26
Applicant: Apple Inc.
Inventor： Marco A. Davila , Joao L. Andres , Bogdan T. Bucheru , Vijay Phadke
Abstract: This disclosure describes a flyback converter with a series-parallel mode (SPM) active clamp. The active clamp, coupled in parallel with the primary coil, may include a clamp switch, two or more snubber capacitors, and associated diodes. The active clamp may be configured to absorb and retain the leakage energy from the leakage inductance of the flyback converter. The clamp switch may be turned on selectively as the primary switch approaches one of a plurality peak values to adjust frequencies of the switching devices. With the active clamp circuit, the flyback converter may first re-capture the leakage energy in the active clamp circuit and then recover it back to the power source.
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Patent Agency Ranking
公开(公告)号：US10985748B2
公开(公告)日：2021-04-20
申请号：US16545748
申请日：2019-08-20
Applicant: Apple Inc.
Inventor： Marco A. Davila , Bogdan T. Bucheru
Abstract: This disclosure describes a gate driver with voltage boosting capabilities. In some embodiments, the gate driver may comprise a charge pump that includes capacitor(s) and switch(es). Responsive a logic low input signal, the gate driver may bypass the capacitor(s) to allow the input digital signal to drive the gating signal directly. Conversely, responsive to a logic high input signal, the gate driver may couple the capacitor(s) in series with the input digital signal to generate a boosted gating signal. In some embodiments, the gate driver may comprise an inductor-capacitor resonant circuit to create a doubled output gating signal with respect to the input digital signal. In some embodiments, the resonant gate driver may include an additional voltage boosting capability that can be selectively enabled to compensate for a voltage drop during the signal transfer from the input to the output.
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公开(公告)号：US10396776B2
公开(公告)日：2019-08-27
申请号：US15878020
申请日：2018-01-23
Applicant: Apple Inc.
Inventor： Marco A. Davila , Bogdan T. Bucheru
Abstract: This disclosure describes a gate driver with voltage boosting capabilities. In some embodiments, the gate driver may comprise a charge pump that includes capacitor(s) and switch(es). Responsive a logic low input signal, the gate driver may bypass the capacitor(s) to allow the input digital signal to drive the gating signal directly. Conversely, responsive to a logic high input signal, the gate driver may couple the capacitor(s) in series with the input digital signal to generate a boosted gating signal. In some embodiments, the gate driver may comprise an inductor-capacitor resonant circuit to create a doubled output gating signal with respect to the input digital signal. In some embodiments, the resonant gate driver may include an additional voltage boosting capability that can be selectively enabled to compensate for a voltage drop during the signal transfer from the input to the output.
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公开(公告)号：US20190007040A1
公开(公告)日：2019-01-03
申请号：US15878020
申请日：2018-01-23
Applicant: Apple Inc.
Inventor： Marco A. Davila , Bogdan T. Bucheru
CPC classification number: H03K17/161 , H02M1/08 , H02M3/07 , H02M3/156 , H02M2001/0058 , H03K17/162 , H03K17/165
Abstract: This disclosure describes a gate driver with voltage boosting capabilities. In some embodiments, the gate driver may comprise a charge pump that includes capacitor(s) and switch(es). Responsive a logic low input signal, the gate driver may bypass the capacitor(s) to allow the input digital signal to drive the gating signal directly. Conversely, responsive to a logic high input signal, the gate driver may couple the capacitor(s) in series with the input digital signal to generate a boosted gating signal. In some embodiments, the gate driver may comprise an inductor-capacitor resonant circuit to create a doubled output gating signal with respect to the input digital signal. In some embodiments, the resonant gate driver may include an additional voltage boosting capability that can be selectively enabled to compensate for a voltage drop during the signal transfer from the input to the output.
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公开(公告)号：US20180205311A1
公开(公告)日：2018-07-19
申请号：US15847008
申请日：2017-12-19
Applicant: Apple Inc.
Inventor： Marco A. Davila , Joao L. Andres , Bogdan T. Bucheru
Abstract: This disclosure describes a flyback converter with a series-parallel mode (SPM) active clamp. The active clamp, coupled in parallel with the primary coil, may include a clamp switch, two or more snubber capacitors, and associated diodes. The active clamp may be configured to absorb and retain the leakage energy from the leakage inductance of the flyback converter. The clamp switch may be turned on selectively as the primary switch approaches one of a plurality peak values to adjust frequencies of the switching devices. With the active clamp circuit, the flyback converter may first re-capture the leakage energy in the active clamp circuit and then recover it back to the power source.
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公开(公告)号：US20190222113A1
公开(公告)日：2019-07-18
申请号：US16365100
申请日：2019-03-26
Applicant: Apple Inc.
Inventor： Marco A. Davila , Joao L. Andres , Bogdan T. Bucheru , Vijay Phadke
Abstract: This disclosure describes a flyback converter with a series-parallel mode (SPM) active clamp. The active clamp, coupled in parallel with the primary coil, may include a clamp switch, two or more snubber capacitors, and associated diodes. The active clamp may be configured to absorb and retain the leakage energy from the leakage inductance of the flyback converter. The clamp switch may be turned on selectively as the primary switch approaches one of a plurality peak values to adjust frequencies of the switching devices. With the active clamp circuit, the flyback converter may first re-capture the leakage energy in the active clamp circuit and then recover it back to the power source.
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