公开(公告)号：US11966544B2

公开(公告)日：2024-04-23

申请号：US18323659

申请日：2023-05-25

Applicant: Apple Inc.

Inventor： Shinya Ono ,  Suhwan Moon ,  Dong-Gwang Ha ,  Jiaxi Hu ,  Hao-Lin Chiu ,  Kwang Soon Park ,  Hassan Edrees ,  Wen-I Hsieh ,  Jiun-Jye Chang ,  Chin-Wei Lin ,  Kyung Wook Kim

IPC: G06F3/041 ,  G06F3/044 ,  G09G3/3208

CPC classification number: G06F3/04184 ,  G06F3/0412 ,  G06F3/0444 ,  G06F3/0446 ,  G09G3/3208 ,  G06F2203/04107 ,  G06F2203/04112

Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The display may include transistors with gate conductors, a first planarization layer formed over the gate conductors, one or more contacts formed in a first source-drain layer within the first planarization layer, a second planarization layer formed on the first planarization layer, one or more data lines formed in a second source-drain layer within the second planarization layer, a third planarization layer formed on the second planarization layer, and a data line shielding structure formed at least partly in a third source-drain layer within the third planarization layer. The data line shielding structure may be a routing line, a blanket layer, a mesh layer formed in one or more metal layers, and/or a data line covering another data line.

公开(公告)号：US11756481B2

公开(公告)日：2023-09-12

申请号：US17469816

申请日：2021-09-08

Applicant: Apple Inc.

Inventor： Hyunsoo Kim ,  Kingsuk Brahma ,  Myungjoon Choi ,  Yue Jack Chu ,  Li-Xuan Chuo ,  Hassan Edrees ,  Chin-Wei Lin ,  Hyunwoo Nho ,  Shinya Ono ,  Alex H. Pai ,  Jie Won Ryu ,  Yao Shi ,  Chaohao Wang

IPC: G09G3/3233 ,  G09G3/3266

CPC classification number: G09G3/3233 ,  G09G3/3266 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2320/0247 ,  G09G2320/041 ,  G09G2320/0626 ,  G09G2360/12

Abstract: Systems, methods, and devices are provided for mitigating visual artifacts by dynamically tuning bias voltages applied to display pixels. An electronic display may include a display pixel and a bias voltage supply. The bias voltage supply may supply a first bias voltage to the display pixel for a first subframe of a frame of image data. The bias voltage supply may supply a different second bias voltage to the display pixel for a second subframe of the frame of image data. This may mitigate certain image artifacts, such as flicker or variable refresh rate luminance difference, that could arise due to display pixel hysteresis that varies across subframes of the image frame.

公开(公告)号：US11348533B1

公开(公告)日：2022-05-31

申请号：US16864241

申请日：2020-05-01

Applicant: Apple Inc.

Inventor： Shinya Ono ,  Chin-Wei Lin ,  Gihoon Choo ,  Shiping Shen ,  Jie Won Ryu ,  Zino Lee ,  Hassan Edrees ,  Ting-Kuo Chang

IPC: G09G3/3266

Abstract: A display may include an array of pixels, where each pixel in the array includes an organic light-emitting diode coupled to associated thin-film transistors. The thin-film transistors may be controlled using at least first and second horizontal scan line signals. Loading different data values into any given row in the array may cause the scan line signals to exhibit varying rise/fall times, which results in horizontal crosstalk and luminance non-uniformity across the display. The rise and fall times of the second scan line signal are crucial, so the second scan line signal is driven by two separate scan line drivers formed on both sides of the display. Only the fall time of the first scan line signal is crucial, so the first scan line signal is driven by only one peripheral scan line driver and is coupled to an auxiliary pull-down circuit that is only activated during the pull-down transition.

公开(公告)号：US20220076627A1

公开(公告)日：2022-03-10

申请号：US17469816

申请日：2021-09-08

Applicant: Apple Inc.

Inventor： Hyunsoo Kim ,  Kingsuk Brahma ,  Myungjoon Choi ,  Yue Jack Chu ,  Li-Xuan Chuo ,  Hassan Edrees ,  Chin-Wei Lin ,  Hyunwoo Nho ,  Shinya Ono ,  Alex H. Pai ,  Jie Won Ryu ,  Yao Shi ,  Chaohao Wang

IPC: G09G3/3233

Abstract: Systems, methods, and devices are provided for mitigating visual artifacts by dynamically tuning bias voltages applied to display pixels. An electronic display may include a display pixel and a bias voltage supply. The bias voltage supply may supply a first bias voltage to the display pixel for a first subframe of a frame of image data. The bias voltage supply may supply a different second bias voltage to the display pixel for a second subframe of the frame of image data. This may mitigate certain image artifacts, such as flicker or variable refresh rate luminance difference, that could arise due to display pixel hysteresis that varies across subframes of the image frame.