公开(公告)号：US20220377352A1

公开(公告)日：2022-11-24

申请号：US17816136

申请日：2022-07-29

Applicant: Apple Inc.

Inventor： Tyson J. Bergland ,  Anthony P. DeLaurier ,  Karthik Ramani ,  Stephan Lachowsky

IPC: H04N19/182 ,  H03M7/30

Abstract: Techniques are disclosed relating to data compression. In some embodiments, compression circuitry determines, at least partially in parallel for multiple different lossless compression techniques, amounts of data needed to represent, using a given lossless compression technique of the multiple lossless compression techniques, individual pixels in a set of pixels being compressed. The compression techniques may include neighbor, origin, and gradient techniques, for example. The compression circuitry may select one of the compression techniques based on comparison, among the compression techniques, of sums of: the determined amount of data for an individual pixel for a given lossless compression technique and compression metadata size for a given lossless compression technique. The compression circuitry may generate and store information that encodes values for the set of pixels using the selected compression technique.

公开(公告)号：US11405622B2

公开(公告)日：2022-08-02

申请号：US16855459

申请日：2020-04-22

Applicant: Apple Inc.

Inventor： Tyson J. Bergland ,  Anthony P. DeLaurier ,  Karthik Ramani ,  Stephan Lachowsky

IPC: H04N11/02 ,  H04N19/182 ,  H03M7/30

Abstract: Techniques are disclosed relating to data compression. In some embodiments, compression circuitry determines, at least partially in parallel for multiple different lossless compression techniques, a number of bits needed to represent a least compressible pixel, using that technique, in a set of pixels being compressed. The compression techniques may include neighbor, origin, and gradient techniques, for example. The compression circuitry may select one of the compression techniques based on the determined numbers of bits for the multiple compression techniques and corresponding header sizes. In some embodiments, the compression circuitry determines, for multiple regions of pixels in the set of pixels, for ones of the compression techniques, a region number of bits needed to represent a least compressible pixel, using that technique. The selection of a compression technique may be further based on region numbers of bits.

公开(公告)号：US11256629B2

公开(公告)日：2022-02-22

申请号：US17027271

申请日：2020-09-21

Applicant: Apple Inc.

Inventor： Karthik Ramani ,  Fang Liu ,  Steven Fishwick ,  Jonathan M. Redshaw

IPC: G06F12/08 ,  G06F12/0888 ,  G06F12/0815 ,  G06F12/0877

Abstract: Techniques are disclosed relating to filtering cache accesses. In some embodiments, a control unit is configured to, in response to a request to process a set of data, determine a size of a portion of the set of data to be handled using a cache. In some embodiments, the control unit is configured to determine filtering parameters indicative of a set of addresses corresponding to the determined size. In some embodiments, the control unit is configured to process one or more access requests for the set of data based on the determined filter parameters, including: using the cache to process one or more access requests having addresses in the set of addresses and bypassing the cache to access a backing memory directly, for access requests having addresses that are not in the set of addresses. The disclosed techniques may reduce average memory bandwidth or peak memory bandwidth.

公开(公告)号：US20210337218A1

公开(公告)日：2021-10-28

申请号：US16855459

申请日：2020-04-22

Applicant: Apple Inc.

Inventor： Tyson J. Bergland ,  Anthony P. DeLaurier ,  Karthik Ramani ,  Stephan Lachowsky

IPC: H04N19/182 ,  H03M7/30

Abstract: Techniques are disclosed relating to data compression. In some embodiments, compression circuitry determines, at least partially in parallel for multiple different lossless compression techniques, a number of bits needed to represent a least compressible pixel, using that technique, in a set of pixels being compressed. The compression techniques may include neighbor, origin, and gradient techniques, for example. The compression circuitry may select one of the compression techniques based on the determined numbers of bits for the multiple compression techniques and corresponding header sizes. In some embodiments, the compression circuitry determines, for multiple regions of pixels in the set of pixels, for ones of the compression techniques, a region number of bits needed to represent a least compressible pixel, using that technique. The selection of a compression technique may be further based on region numbers of bits.

公开(公告)号：US20180349291A1

公开(公告)日：2018-12-06

申请号：US15610008

申请日：2017-05-31

Applicant: Apple Inc.

Inventor： Wolfgang H. Klingauf ,  Kenneth C. Dyke ,  Karthik Ramani ,  Winnie W. Yeung ,  Anthony P. DeLaurier ,  Luc R. Semeria ,  David A. Gotwalt ,  Srinivasa Rangan Sridharan ,  Muditha Kanchana

IPC: G06F12/123 ,  G06F12/0808 ,  G06F12/0815 ,  G06F12/0804

CPC classification number: G06F12/123 ,  G06F12/0804 ,  G06F12/0808 ,  G06F12/0815 ,  G06F2212/608 ,  G06F2212/621 ,  G06F2212/69

Abstract: Systems, apparatuses, and methods for efficiently allocating data in a cache are described. In various embodiments, a processor decodes an indication in a software application identifying a temporal data set. The data set is flagged with a data set identifier (DSID) indicating temporal data to drop after consumption. When the data set is allocated in a cache, the data set is stored with a non-replaceable attribute to prevent a cache replacement policy from evicting the data set before it is dropped. A drop command with an indication of the DSID of the data set is later issued after the data set is read (consumed). A copy of the data set is not written back to the lower-level memory although the data set is removed from the cache. An interrupt is generated to notify firmware or other software of the completion of the drop command.

公开(公告)号：US12052038B2

公开(公告)日：2024-07-30

申请号：US18302513

申请日：2023-04-18

Applicant: Apple Inc.

Inventor： Tyson J. Bergland ,  Karthik Ramani ,  Stephan Lachowsky ,  Justin A. Hensley ,  Davoud A. Jamshidi

IPC: H03M7/30 ,  H04N19/176 ,  H04N19/182

CPC classification number: H03M7/3059 ,  H04N19/176 ,  H04N19/182

Abstract: Techniques are disclosed relating to compression of pixel data using different quantization for different regions of a block of pixels being compressed. In some embodiments, compression circuitry is configured to determine, for multiple components included in pixels of the block of pixels being compressed, respective smallest and greatest component values in respective regions of the block of pixels. The compression circuitry may determine, based on the determined smallest and greatest component values, to use a first number of bits to represent delta values relative to a base value for a first component in a first region and a second, different number of bits to represent delta values relative to a base value for a second component in the first region. The compression circuitry may then quantize delta values for the first and second components of pixels in the first region of the block of pixels using the determined first and second numbers of bits. In some embodiments, the compression circuitry determines whether to provide cross-component bit sharing within a region.

公开(公告)号：US11843788B2

公开(公告)日：2023-12-12

申请号：US17816136

申请日：2022-07-29

Applicant: Apple Inc.

Inventor： Tyson J. Bergland ,  Anthony P. DeLaurier ,  Karthik Ramani ,  Stephan Lachowsky

IPC: H04N11/02 ,  H04N19/182 ,  H03M7/30

CPC classification number: H04N19/182 ,  H03M7/3059

Abstract: Techniques are disclosed relating to data compression. In some embodiments, compression circuitry determines, at least partially in parallel for multiple different lossless compression techniques, amounts of data needed to represent, using a given lossless compression technique of the multiple lossless compression techniques, individual pixels in a set of pixels being compressed. The compression techniques may include neighbor, origin, and gradient techniques, for example. The compression circuitry may select one of the compression techniques based on comparison, among the compression techniques, of sums of: the determined amount of data for an individual pixel for a given lossless compression technique and compression metadata size for a given lossless compression technique. The compression circuitry may generate and store information that encodes values for the set of pixels using the selected compression technique.

公开(公告)号：US20210004331A1

公开(公告)日：2021-01-07

申请号：US17027271

申请日：2020-09-21

Applicant: Apple Inc.

Inventor： Karthik Ramani ,  Fang Liu ,  Steven Fishwick ,  Jonathan M. Redshaw

IPC: G06F12/0888 ,  G06F12/0815 ,  G06F12/0877

Abstract: Techniques are disclosed relating to filtering cache accesses. In some embodiments, a control unit is configured to, in response to a request to process a set of data, determine a size of a portion of the set of data to be handled using a cache. In some embodiments, the control unit is configured to determine filtering parameters indicative of a set of addresses corresponding to the determined size. In some embodiments, the control unit is configured to process one or more access requests for the set of data based on the determined filter parameters, including: using the cache to process one or more access requests having addresses in the set of addresses and bypassing the cache to access a backing memory directly, for access requests having addresses that are not in the set of addresses. The disclosed techniques may reduce average memory bandwidth or peak memory bandwidth.

公开(公告)号：US10783085B1

公开(公告)日：2020-09-22

申请号：US16290646

申请日：2019-03-01

Applicant: Apple Inc.

Inventor： Karthik Ramani ,  Fang Liu ,  Steven Fishwick ,  Jonathan M. Redshaw

IPC: G06F12/0888 ,  G06F12/0815 ,  G06F12/0877

Abstract: Techniques are disclosed relating to filtering cache accesses. In some embodiments, a control unit is configured to, in response to a request to process a set of data, determine a size of a portion of the set of data to be handled using a cache. In some embodiments, the control unit is configured to determine filtering parameters indicative of a set of addresses corresponding to the determined size. In some embodiments, the control unit is configured to process one or more access requests for the set of data based on the determined filter parameters, including: using the cache to process one or more access requests having addresses in the set of addresses and bypassing the cache to access a backing memory directly, for access requests having addresses that are not in the set of addresses. The disclosed techniques may reduce average memory bandwidth or peak memory bandwidth.