公开(公告)号：US20230172074A1

公开(公告)日：2023-06-01

申请号：US17847186

申请日：2022-06-23

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC. ,  Beijing Superstring Academy of Memory Technology

Inventor： Xiaoguang WANG ,  Huihui LI ,  Qiang ZHANG ,  Shan WANG ,  Minmin WU

IPC: H01L43/02 ,  H01L43/12

CPC classification number: H01L43/02 ,  H01L43/12

Abstract: Embodiments relate to the field of semiconductor manufacturing technology, and more particularly, to a method for fabricating a semiconductor structure and a semiconductor structure. The fabricating method includes: providing a substrate including an array region and a peripheral region; and forming, on the substrate, a first mask layer covering the array region and the peripheral region, the first mask layer having a first device structure pattern directly facing the array region and a second device structure pattern directly facing the peripheral region. Through the method for fabricating a semiconductor structure, the first mask layer having the first device structure pattern and the second device structure pattern is formed on the substrate, and then the substrate is etched by using the first device structure pattern and the second device structure pattern as mask layer to synchronously form a peripheral region structure and an array region structure on the substrate.

公开(公告)号：US20230171970A1

公开(公告)日：2023-06-01

申请号：US17827808

申请日：2022-05-30

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC. ,  Beijing Superstring Academy of Memory Technology

Inventor： Xiaoguang WANG ,  Huihui LI ,  Wei CHANG ,  Kanyu CAO

IPC: H01L27/105

CPC classification number: H01L27/1052

Abstract: Embodiment provides a semiconductor structure and a fabrication method thereof, and relates to the field of semiconductor technology. The method includes: providing a substrate having an array region including a first region and a second region arranged adjacently; and forming a first memory in the first region and forming a second memory in the second region by means of a same fabrication process, the fabrication process being a process configured for fabricating the first memory.

公开(公告)号：US20230170224A1

公开(公告)日：2023-06-01

申请号：US17826177

申请日：2022-05-27

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC. ,  Beijing Superstring Academy of Memory Technology

Inventor： Xiaoguang WANG ,  Huihui LI ,  Qiang ZHANG ,  Shan WANG ,  Minmin WU

IPC: H01L21/308 ,  H01L21/033 ,  H01L27/108

CPC classification number: H01L21/3086 ,  H01L21/0337 ,  H01L27/10894 ,  H01L21/3081

Abstract: Embodiments relate to the field of semiconductor manufacturing technology, and more particularly, to a method for fabricating a semiconductor structure and a semiconductor structure. The method for fabricating a semiconductor structure provided by the embodiments of the present disclosure includes: providing a substrate including an array region and a peripheral region; forming a first mask layer covering the array region and the peripheral region on the substrate; forming a first device structure pattern on the first mask layer, and then forming a second device structure pattern on the first mask layer; and etching the substrate by using the first device structure pattern and the second device structure pattern as mask layer to form a peripheral region structure and an array region structure synchronously on the substrate. Technological processes are simplified, fabrication difficulties are reduced, and production efficiency is improved.