公开(公告)号：EP2686958A2

公开(公告)日：2014-01-22

申请号：EP12761258.8

申请日：2012-03-16

Applicant: Cisco Technology, Inc.

Inventor： SHASTRI, Kalpendu ,  DAMA, Bipin ,  WEBSTER, Mark ,  PIEPE, David

IPC: H03K19/0175 ,  G06F13/14

CPC classification number: H01P3/00 ,  G02F1/011 ,  G02F1/0121 ,  G02F1/0327 ,  G02F1/225 ,  G02F1/2255 ,  G02F2201/124 ,  G02F2201/126 ,  H05K1/0245 ,  H05K2201/09245 ,  H05K2201/09254 ,  H05K2201/10121

Abstract: A configuration for routing electrical signals between a conventional electronic integrated circuit (IC) and an opto-electronic subassembly is formed as an array of signal paths carrying oppositely-signed signals on adjacent paths to lower the inductance associated with the connection between the IC and the opto-electronic subassembly. The array of signal paths can take the form of an array of wirebonds between the IC and the subassembly, an array of conductive traces formed on the opto-electronic subassembly, or both.

公开(公告)号：EP2441184B1

公开(公告)日：2018-11-21

申请号：EP10786828.3

申请日：2010-06-10

Applicant: Cisco Technology, Inc.

Inventor： SHASTRI, Kalpendu ,  DAMA, Bipin ,  WEBSTER, Mark

IPC: H04B10/50

CPC classification number: H04B10/801 ,  H04B10/505 ,  H04B10/516 ,  H04B10/524 ,  H04L7/0008 ,  H04L7/0075

Abstract: An optical interconnection arrangement for use in high data applications is presented that eliminates the need for extensive serialization/de-serialization (SERDES) functionality by utilizing pulse amplitude modulation (PAM) techniques to represent the data in the optical domain while utilizing a separate channel for transmitting an optical clock signal, eliminating the need for clock recovery circuitry on the receive end of the arrangement.

公开(公告)号：EP1625615B1

公开(公告)日：2017-07-26

申请号：EP04750395.8

申请日：2004-04-21

Applicant: Cisco Technology, Inc.

Inventor： PATEL, Vipulkumar ,  GHIRON, Margaret ,  GOTHOSKAR, Prakash ,  MONTGOMERY, Robert, Keith ,  SHASTRI, Kalpendu ,  PATHAK, Soham ,  YANUSHEFSKI, Katherine, A.

IPC: H01L21/76 ,  H01L27/146 ,  H01L31/12 ,  H01L21/84 ,  H01L27/13 ,  H01L27/12 ,  G02B6/12 ,  G02F1/025

CPC classification number: H01L27/14689 ,  G02B6/12004 ,  G02F1/025 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/13 ,  H01L27/14636 ,  H01L27/14643 ,  H01L31/12

公开(公告)号：EP2776880A1

公开(公告)日：2014-09-17

申请号：EP12798508.3

申请日：2012-11-13

Applicant: Cisco Technology, Inc. ,  Shastri, Kalpendu ,  Kachru, Ravinder ,  Desai, Kishor

Inventor： SHASTRI, Kalpendu ,  KACHRU, Ravinder ,  DESAI, Kishor

IPC: G02B6/42

CPC classification number: G02B6/423 ,  G01B11/14 ,  G02B6/4239 ,  G02B6/4249

Abstract: An arrangement for providing passive alignment of optical components on a common substrate uses a set of reference cavities, where each optical device is positioned within a separate reference cavity. The reference cavities are formed to have a predetermined depth, with perimeters slightly larger than the footprint of their associated optical components. The reference cavity includes at least one right-angle corner that is used as a registration corner against which a right-angle corner of an associated optical component is positioned. The placement of each optical component in its own reference cavity allows for passive optical alignment to be achieved by placing each component against its predefined registration corner.

公开(公告)号：EP2769253A1

公开(公告)日：2014-08-27

申请号：EP12784181.5

申请日：2012-10-19

Applicant: Cisco Technology, Inc. ,  Desai, Kishor ,  Kachru, Ravinder ,  Patel, Vipulkumar ,  Dama, Bipin ,  Shastri, Kalpendu ,  Pathak, Soham

Inventor： DESAI, Kishor ,  KACHRU, Ravinder ,  PATEL, Vipulkumar ,  DAMA, Bipin ,  SHASTRI, Kalpendu ,  PATHAK, Soham

IPC: G02B6/42 ,  H01L25/16

Abstract: An opto-electronic assembly is provided comprising a substrate (generally of silicon or glass) for supporting a plurality of interconnected optical and electrical components. A layer of sealing material is disposed to outline a defined peripheral area of the substrate. A molded glass lid is disposed over and bonded to the substrate, where the molded glass lid is configured to create a footprint that matches the defined peripheral area of the substrate. The bottom surface of the molded glass lid includes a layer of bonding material that contacts the substrate's layer of sealing material upon contact, creating a bonded assembly. In one form, a wafer level assembly process is proposed where multiple opto-electronic assemblies are disposed on a silicon wafer and multiple glass lids are molded in a single sheet of glass that is thereafter bonded to the silicon wafer.

公开(公告)号：EP2769253B1

公开(公告)日：2020-07-15

申请号：EP12784181.5

申请日：2012-10-19

Applicant: Cisco Technology, Inc.

Inventor： DESAI, Kishor ,  KACHRU, Ravinder ,  PATEL, Vipulkumar ,  DAMA, Bipin ,  SHASTRI, Kalpendu ,  PATHAK, Soham

IPC: G02B6/42 ,  H01L21/50 ,  H05K1/02

公开(公告)号：EP2686958B1

公开(公告)日：2019-10-02

申请号：EP12761258.8

申请日：2012-03-16

Applicant: Cisco Technology, Inc.

Inventor： SHASTRI, Kalpendu ,  DAMA, Bipin ,  WEBSTER, Mark ,  PIEDE, David

IPC: G02F1/01 ,  H01P3/00 ,  G02F1/03 ,  G02F1/225 ,  H05K1/02

公开(公告)号：EP2545408B1

公开(公告)日：2017-07-26

申请号：EP11753787.8

申请日：2011-02-24

Applicant: Cisco Technology, Inc.

Inventor： WEBSTER, Mark ,  SHASTRI, Kalpendu

IPC: G02F1/025 ,  G02B6/12 ,  G02F1/225

CPC classification number: G02F1/2257 ,  G02F1/025 ,  G02F2203/20 ,  G02F2203/25 ,  G02F2203/255

公开(公告)号：EP2027497B1

公开(公告)日：2016-11-02

申请号：EP07809457.0

申请日：2007-06-11

Applicant: Cisco Technology, Inc.

Inventor： MONTGOMERY, Robert, Keith ,  GHIRON, Margaret ,  GOTHOSKAR, Prakash ,  MOSINSKIS, Paulius, Mindaugas ,  PATEL, Vipulkumar ,  SHASTRI, Kalpendu ,  WEBSTER, Mark

IPC: G02B6/12 ,  G02F1/295

CPC classification number: G02F1/025 ,  G02F1/0147 ,  G02F1/225 ,  G02F2201/126

公开(公告)号：EP2652534A1

公开(公告)日：2013-10-23

申请号：EP11849324.6

申请日：2011-12-14

Applicant: Cisco Technology, Inc.

Inventor： SHASTRI, Kalpendu ,  NERING, Raymond

IPC: G02B6/12

CPC classification number: G02B6/4246 ,  G02B6/305 ,  G02B6/42 ,  G02B6/421 ,  G02B6/4213

Abstract: A silicon-based opto-electronic circuit is formed to exhibit reduced polarization- dependent loss by strategically placing the photodetecting device as close as possible to the entry point of the optical signal into the opto-electronic circuit arrangement. While the incoming optical signal will include both TE and TM modes, by minimizing the length of the optical waveguide path along which the signal must propagate before reaching a photo detector, the attenuation associated with TM mode signal will be negligible.