公开(公告)号：JPH0275222A

公开(公告)日：1990-03-14

申请号：JP18617589

申请日：1989-07-20

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： MISHIEERU JIISA ,  SERUJIO PARAARA

IPC: H02H9/04 ,  H03K17/06 ,  H03K17/0814 ,  H03K17/567 ,  H03K17/687 ,  H03K17/695

Abstract: PURPOSE: To reduce a discharge time of an inductive load by allowing a threshold level means with a prescribed breakdown voltage to be activated when a voltage of a load electrode of a power device reaches an ground voltage or below and then a breakdown threshold level. CONSTITUTION: A discharge circuit is provided with a means 18 having a prescribed breakdown threshold voltage and the threshold level means 18 is configured so that the means 18 is activated when a voltage at a load electrode 5 of a power device 2 reaches an ground voltage or below and then a breakdown threshold voltage. A voltage at which discharge of an inductor 1 is produced is set sufficiently higher up to a limit and the absolute value of the discharge voltage is higher than that of a conventional technology by properly selecting a breakdown voltage of the Zehner diode 18 being the threshold level means 1. Thus, the discharge time is reduced.

公开(公告)号：JPH02253653A

公开(公告)日：1990-10-12

申请号：JP4273690

申请日：1990-02-26

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： MARIO PAPARO ,  SERUJIO PARAARA

IPC: H01L21/822 ,  H01L21/8222 ,  H01L27/04 ,  H01L27/06 ,  H03K5/02

Abstract: PURPOSE: To enable formation of a two-driving staged internal component by low voltage technique by a method wherein a driving stage is formed on the regions of insulating pockets respectively, a level converting circuit component is formed on the other region, and a means, with which this circuit component is protected from high service voltage, is provided. CONSTITUTION: The layers 6 and 7 which are buried in the second epitaxial layer having the characteristics to resist low voltage, superposed regions 8 and 9, and another region 5 of the second epitaxial layer, which is superposed on the region 25 of the first epitaxial layer 2, are provided. The regions 8 and 9 of insulated pockets 3 and 4 are designed in such a manner that two driving stages DR1 and DR2 are formed and the region 5 forms a level converting circuit component T3. Besides, means 20 to 23, with which the circuit component T3 is protected from high voltage are provided. The internal component of two driving stages can be formed by a low voltage technique.

公开(公告)号：JPH01146352A

公开(公告)日：1989-06-08

申请号：JP26964288

申请日：1988-10-27

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： SERUJIO PARAARA ,  MARIO PAPAARO ,  ROBERUTO PETSURIKAANO

IPC: H01L21/331 ,  H01L21/761 ,  H01L27/06 ,  H01L29/73 ,  H01L29/732 ,  H01L29/861

Abstract: PURPOSE: To obtain integrated structure which can operate at a voltage higher than the breakdown voltage between each element and an insulating pocket containing it, by making the breakdown voltage between the insulating pocket and a semiconductor substrate surrounding it remarkably higher than the breakdown voltage between the pocket and the element therein. CONSTITUTION: In an integrated structure which is formed by impurity diffusion in semiconductor substrates 1, 2 and constituted of circuit elements 20, 21, etc., arranged in the respective insulating pockets 5, a voltage between the minimum voltage V2 and the maximum voltage V1 which are applied to the elements 20, 21, etc., contained in the corresponding pockets 5 is supplied to each of the insulating pockets 5. The breakdown voltage between the insulating pockets 5 and the semiconductor substrates 1, 2 surrounding the insulating pockets 5 is made remarkably higher than the breakdown voltage between the insulating pockets 5 and the elements 20, 21, etc., contained therein. For example, the breakdown voltage of a diode D2 formed of the insulating pocket 5 and the substrates 1, 2 is made higher than that of a diode D1 formed of the collector region 9 of a transistor 20 and the insulating pocket 5.

公开(公告)号：JPH03180914A

公开(公告)日：1991-08-06

申请号：JP28450490

申请日：1990-10-24

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： SERUJIO PARAARA ,  SUTEFUAANO SUERI

IPC: G05F1/40 ,  H02M1/00 ,  H02M1/36

Abstract: PURPOSE: To secure the effective operation in a starting phase by providing a control unit which opens a first switch and closes a second switch at the time when the voltage of the output terminal of an adjuster reaches a prescribed threshold securing the effective operation of an integrated circuit. CONSTITUTION: A solid-state switch 11 having a control electrode, an electronic element 12 consisting of a diode or another solid-state switch having a control electrode, and a control unit s to which a voltage is supplied through a conductor 1 and which controls the output voltage through a conductor 6 are provided. The control unit S closes the switch 11 at the time of turning on the adjuster and keeps it closed till arrival of the voltage at the prescribed threshold securing the effective operation of an integrated circuit CI and opens it at the time of this arrival. If the electronic element 12 consists of the switch having the control electrode, the control unit S closes this switch also simultaneously. Thus, the effective operation is always secuted even in the initial starting phase.

公开(公告)号：JPH0360039A

公开(公告)日：1991-03-15

申请号：JP19320290

申请日：1990-07-23

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： SARUBATOORE RACHITEI ,  SERUJIO PARAARA

IPC: H01L29/73 ,  H01L21/331 ,  H01L21/822 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L29/732

Abstract: PURPOSE: To prevent break of a parasitic transistor by providing a shield element against negative impulses of a power source voltage in its voltage limiter. CONSTITUTION: If power apparatuses Q3 and Q4 are in a conducting state and an inductor L is assumed to be in a charged state, then any negative impulse on the voltage Vs executes the extinction of the arc on the power apparatuses Q3 and Q4 at the negative base voltage of the transistor Q3. At the same time, a voltage Vc at the common collector rises up to a clamp voltage set by a Zener diode Z2, and two breakdown stresses reverse to the power apparatuses Q3 and Q4 are produced, but these stresses are prevented by a voltage limiter constituted with transistors Q2 and Q5, a resistor Rc and a Zener diode Z1. Under this condition, the transistor Q2 is kept at a negative potential at its base by a voltage Vs, so that the arc is extinguished because the base is kept at a negative potential by the voltage Vs, and a positive over-voltage Vc on the load L ignites the transistor Q5, power apparatuses Q3 and Q4 in Darlington configuration are returned to a conducting state, and a positive over-voltage is discharged to the ground. By doing this, the parasitic effect caused by the negative impulse of the power source voltage can be eliminated.