Abstract:
A planar, waveguide-based silicon Schottky barrier photodetector includes a third terminal in the form of a field plate to improve the responsivity of the detector. Preferably, a silicide used for the detection region is formed during a processing step where other silicide contact regions are being formed. The field plate is preferably formed as part of the first or second layer of CMOS metallization and is controlled by an applied voltage to modify the electric field in the vicinity of the detector's silicide layer. By modifying the electric field, the responsivity of the device is "tuned" so as to adjust the momentum of "hot" carriers (electrons or holes, depending on the conductivity of the silicon) with respect to the Schottky barrier of the device. The applied potential functions to align with the direction of momentum of the "hot" carriers in the preferred direction "normal" to the silicon-silicide interface, allowing for an increased number to move over the Schottky barrier and add to the generated photocurrent.
Abstract:
An optical modulator may include a lower waveguide, an upper waveguide, and a dielectric layer disposed therebetween. When a voltage potential is created between the lower and upper waveguides, these layers form a silicon-insulator-silicon capacitor (also referred to as SISCAP) guide that provides efficient, high-speed optical modulation of an optical signal passing through the modulator. In one embodiment, at least one of the waveguides includes a respective ridge portion aligned at a charge modulation region which may aid in confining the optical mode laterally (e.g., in the width direction) in the optical modulator. In another embodiment, ridge portions may be formed on both the lower and the upper waveguides. These ridge portions may be aligned in a vertical direction (e.g., a thickness direction) so that ridges overlap which may further improve optical efficiency by centering an optical mode in the charge modulation region.