公开(公告)号：DE3023699A1

公开(公告)日：1982-01-14

申请号：DE3023699

申请日：1980-06-25

Applicant: IBM DEUTSCHLAND

Inventor： STAIGER DIETER

IPC: G01R31/28 ,  G01R31/319 ,  G11C29/00 ,  H03K3/78 ,  H03K3/64

Abstract: In a method for the generation, without dead time, of pulses appearing in successive pulse intervals, with a high time resolution of the pulse intervals and of the pulses, the signals characterizing start (IIN1A, IIN2A) and end (IIN1E, IIN2E) of a pulse interval are generated under storage control by an oscillator (1) for giving coarse time raster values, and a delay circuit (3, 4) series-arranged with the oscillator (1) and with selective (7, 8) delay circuit taps (5, 6) for giving fine time raster values. The signals characterizing the pulse intervals are alternatingly applied to one of two paths (path I, path II), such that the signal characterizing the respective pulse interval start coincides with the coarse time raster predetermined by the oscillator (1). For each path, the leading and trailing edge of a pulse to be generated within a pulse interval is derived via oscillator clock-driven counters (45, 47, 46 and 48) loadable with a count, upon a specific count being reached. Series-arranged to the counters for generating the leading and trailing edges ( 45, 46 and 47, 48) a respective common delay circuit (51 and 52) is provided with storage-controlled (43, 44) selectable delay line taps (62 and 79) for a fine time raster. The pulse information generated on both paths is joined on a common line (65).

公开(公告)号：GB2459752B

公开(公告)日：2012-06-27

申请号：GB0905058

申请日：2009-03-25

Applicant: IBM

Inventor： STAIGER DIETER ,  HUELS HARALD

IPC: H05K1/02 ,  G11C5/00 ,  H05K1/18

公开(公告)号：GB2463538A

公开(公告)日：2010-03-24

申请号：GB0905032

申请日：2009-03-25

Applicant: IBM

Inventor： STAIGER DIETER ,  HUELS HARALD

IPC: H05K7/20 ,  G06F1/20

Abstract: A thermal link system 300 for a computer system, such as blade or rack server (figs 1-3), has a subsystem 180 of primary printed circuit board 100, which has at least one subsystem board 210 which carries one or more subsystem modules 220, such as a stack of DIMM memory modules 220, connected to the subboard. Thermal link elements 310, 312, 314, 316 extract heat from the DIMM modules towards at least one thermal interface, such as 304 which connects to dedicated inner layers 104 of the primary board (100) and/or interface 320 which connects to the system housing 150. The thermal elements 312, 310 preferably support the memory modules 220 and thus the sub-boards 210 via connectors 218. The thermal elements may comprise heat-pipes( fig 9).

公开(公告)号：DE602004005546T2

公开(公告)日：2007-12-13

申请号：DE602004005546

申请日：2004-08-24

Applicant: IBM

Inventor： STAIGER DIETER

IPC: H04L12/56

Abstract: The invention relates to a method of routing a message in a network in which processing units have virtual addresses based on a spatial coordinate system. When a message including a target address is received at a processing unit, the target address is compared to the address of the receiving unit. If the addresses match, the message is processed by the receiving unit. If the addresses don't match, the first unit identifies nearest neighboring unit to which the message can be forwarded. The process is repeated until the message reaches the target system.

公开(公告)号：DE602004005546D1

公开(公告)日：2007-05-10

申请号：DE602004005546

申请日：2004-08-24

Applicant: IBM

Inventor： STAIGER DIETER

IPC: H04L12/56

Abstract: The invention relates to a method of routing a message in a network in which processing units have virtual addresses based on a spatial coordinate system. When a message including a target address is received at a processing unit, the target address is compared to the address of the receiving unit. If the addresses match, the message is processed by the receiving unit. If the addresses don't match, the first unit identifies nearest neighboring unit to which the message can be forwarded. The process is repeated until the message reaches the target system.

公开(公告)号：AT358376T

公开(公告)日：2007-04-15

申请号：AT04104061

申请日：2004-08-24

Applicant: IBM

Inventor： STAIGER DIETER

IPC: H04L12/56

Abstract: The invention relates to a method of routing a message in a network in which processing units have virtual addresses based on a spatial coordinate system. When a message including a target address is received at a processing unit, the target address is compared to the address of the receiving unit. If the addresses match, the message is processed by the receiving unit. If the addresses don't match, the first unit identifies nearest neighboring unit to which the message can be forwarded. The process is repeated until the message reaches the target system.

公开(公告)号：HU224588B1

公开(公告)日：2005-11-28

申请号：HU0000348

申请日：1997-10-24

Applicant: IBM

Inventor： STAIGER DIETER

IPC: G02B6/43 ,  H04B10/00 ,  H04B10/80

Abstract: The invention relates to a bi-directional optical data transfer system. The data is transferred by a diffuse light between several electronic components with several transmission links, wherein each transmission link is provided with a covering to prevent the transmission links from interfering with each other.

公开(公告)号：DE10026918A1

公开(公告)日：2000-12-28

申请号：DE10026918

申请日：2000-05-30

Applicant: IBM

Inventor： STAIGER DIETER

IPC: H04L12/40 ,  H04L29/06 ,  H04L12/26 ,  H02J13/00

Abstract: The system exerts no significant electrical and/or physical influence on the protected network and/or bus systems. All messages addressed to the network and/or bus system are continuously monitored and/or detected. The system has an internal data/message store for the detected data. An Independent claim is also included for a method of providing access to protected networks and/or bus systems for application processor units and for the use of a control system in a motor vehicle.

公开(公告)号：DE10000997B4

公开(公告)日：2006-06-01

申请号：DE10000997

申请日：2000-01-13

Applicant: IBM

Inventor： STAIGER DIETER

IPC: B60R16/02 ,  G06F15/16 ,  B60R16/023 ,  G05B15/02 ,  G05B19/04 ,  G06F7/00

公开(公告)号：DE60202857D1

公开(公告)日：2005-03-10

申请号：DE60202857

申请日：2002-02-15

Applicant: IBM

Inventor： STAIGER DIETER

IPC: G10L15/28

Abstract: In a processor system for audio processing, such as voice recognition and text-to-speech, a dedicated front-end processor, a core processor and a dedicated back-end processor are provided which are coupled by dual access stack. When an analog audio signal is inputted core processor is invoked only when a certain amount of data is present in the dual access stack. Likewise the back-end processor is invoked only when a certain amount of data is present in the dual access stack. This way the overall processing power required by the processing task is minimized as well as the power consumption of the processor system.