公开(公告)号：US20250159913A1

公开(公告)日：2025-05-15

申请号：US18506033

申请日：2023-11-09

Applicant: GlobalFoundries U.S. Inc.

Inventor： Judson Robert Holt ,  Peter Baars ,  Alexander M. Derrickson

IPC: H01L29/737 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/10 ,  H01L29/66

Abstract: Embodiments of the disclosure provide a structure including a first emitter/collector (E/C) layer over a substrate. A base structure is over the substrate and adjacent a first horizontal end of the first E/C layer. A bounding structure is over the substrate and adjacent a second horizontal end of the first E/C layer. The bounding structure, in some implementations, may include a gate conductor or a base material. A spacer is between the first E/C layer and the bounding structure.

公开(公告)号：US11916109B2

公开(公告)日：2024-02-27

申请号：US17804201

申请日：2022-05-26

Applicant: GlobalFoundries U.S. Inc.

Inventor： Peter Baars ,  Alexander M. Derrickson ,  Ketankumar Harishbhai Tailor ,  Zhixing Zhao ,  Judson R. Holt

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/735

CPC classification number: H01L29/1004 ,  H01L29/66234 ,  H01L29/735

Abstract: Embodiments of the disclosure provide a bipolar transistor structure having a base with a varying horizontal width and methods to form the same. The bipolar transistor structure includes a first emitter/collector (E/C) layer on an insulator layer. A base layer is over the insulator layer. A spacer between the first E/C layer and the base layer. The base layer includes a lower base region, and the spacer is adjacent to the lower base region and the first E/C layer. An upper base region is on the lower base region and the spacer. A horizontal width of the upper base region is larger than a horizontal width of the lower base region.

公开(公告)号：US11705455B2

公开(公告)日：2023-07-18

申请号：US16930547

申请日：2020-07-16

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Thorsten E. Kammler ,  Peter Baars

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/161 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/0928 ,  H01L21/823814 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/823892 ,  H01L29/161 ,  H01L29/42364 ,  H01L29/4966 ,  H01L29/66492 ,  H01L29/7833

Abstract: The present disclosure relates to semiconductor devices, and more particularly, to high voltage extended drain MOSFET (EDMOS) devices in a high-k metal gate (HKMG) and methods of manufacture. A structure of the present disclosure includes a plurality of extended drain MOSFET (EDMOS) devices on a high voltage well with a split-gate dielectric material including a first gate dielectric material and a second gate dielectric material, the second gate dielectric material including a thinner thickness than the first gate dielectric material, and a high-k dielectric material on the split-gate dielectric material.

公开(公告)号：US11456364B2

公开(公告)日：2022-09-27

申请号：US17029446

申请日：2020-09-23

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Ketankumar H. Tailor ,  Peter Baars ,  Ruchil K. Jain

IPC: H01L29/40 ,  H01L29/49 ,  H01L29/78 ,  H01L29/06

Abstract: Embodiments of the disclosure provide an integrated circuit device and related methods. The disclosure may provide a transistor device, including: a gate structure; a drain extension region extending laterally from partially under the gate structure to a drain region; and a gate spacer located over the drain extension region. A silicide-blocking layer is over and in contact with the gate spacer. The silicide-blocking layer has a first end over the gate structure and a second, opposing end over the drain extension region. The structure also provides a conductive field plate, including a conductive layer over and in contact with the silicide-blocking layer. A field plate contact is formed on the conductive field plate.

公开(公告)号：US20220302306A1

公开(公告)日：2022-09-22

申请号：US17206195

申请日：2021-03-19

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Ketankumar Harishbhai Tailor ,  Peter Baars

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/66

Abstract: An integrated circuit (IC) structure and a field plate are disclosed. The IC structure and field plate may find advantageous application with, for example, extended drain metal-oxide semiconductor (EDMOS) transistors. The IC structure includes a transistor including a metal gate structure and a drain extension region extending laterally from partially under the metal gate structure to a drain region. A metal field plate is over the drain extension region. Due to being formed simultaneously as part of a gate-last formation approach, the metal field plate has an upper surface coplanar with an upper surface of the metal gate structure. A field plate contact may be on the metal field plate.