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    EXPANSION BUS DEVICES
    12.
    发明申请
    EXPANSION BUS DEVICES 审中-公开
    扩展总线设备

    公开(公告)号：WO2017131741A1

    公开(公告)日：2017-08-03

    申请号：PCT/US2016/015646

    申请日：2016-01-29

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： BENEDICT, Melvin K. ,  LUPTON, Glenn H. ,  SABOTTA, Michael L. ,  PURCELL, Brian T. ,  RAYMOND, Patrick

    IPC: G06F13/40 ,  G06F13/42

    CPC classification number: G06F13/4068

    Abstract: The present disclosure discloses an expansion bus device that is communicatively coupled to a plurality of input-output devices. The expansion bus device includes a plurality of input-output slots, via which the plurality of input-output devices are coupled to the expansion bus device. The expansion bus device also includes a retimer switch communicatively connected to each of the plurality of input-output slots. The retimer switch supports switching between the plurality of input-output slots.

    Abstract translation: 本公开公开了通信地耦合到多个输入输出设备的扩展总线设备。 扩展总线设备包括多个输入输出槽，多个输入输出设备通过所述多个输入输出槽与扩展总线设备耦合。 扩展总线设备还包括通信连接到多个输入输出槽中的每一个的重定时器开关。 重定时器开关支持在多个输入 - 输出插槽之间切换。

    SERVER TRAY BACKUP POWER REDUNDANCY
    13.
    发明申请
    SERVER TRAY BACKUP POWER REDUNDANCY 审中-公开
    服务器托盘备份电源冗余

    公开(公告)号：WO2017058172A1

    公开(公告)日：2017-04-06

    申请号：PCT/US2015/052936

    申请日：2015-09-29

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： NGUYEN, Hai Ngoc ,  RAYMOND, Patrick ,  BENEDICT, Melvin K. ,  WANG, Han

    IPC: G06F1/30 ,  G06F1/26

    CPC classification number: G06F1/30 ,  H05K7/1492

    Abstract: In one example, a system for server tray backup power redundancy includes an interruptible power supply and uninterruptible power supply coupled to a first server tray within a server enclosure and a second server tray within the server enclosure, wherein the uninterruptible power supply is coupled in parallel to the first server tray and the second server tray.

    Abstract translation: 在一个示例中，用于服务器托盘备份电源冗余的系统包括耦合到服务器机箱内的第一服务器托盘和服务器机箱内的第二服务器托盘的可中断电源和不间断电源，其中不间断电源并联 到第一个服务器托盘和第二个服务器托盘。

    MODIFICATION OF A BUS CHANNEL
    14.
    发明申请
    MODIFICATION OF A BUS CHANNEL 审中-公开
    总线通道的修改

    公开(公告)号：WO2017018991A1

    公开(公告)日：2017-02-02

    申请号：PCT/US2015/042004

    申请日：2015-07-24

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： BENEDICT, Melvin K. ,  BENSON, Edward G. ,  BOIS, Karl J.

    IPC: G06F13/16 ,  G06F12/02

    CPC classification number: G06F13/16

    Abstract: A system and methods related to modification of a bus channel are provided herein. The system may include a processor and a memory controller electrically connected to the processor. The system may include a memory bus and memory slots electrically connected to the memory controller via the memory bus. Each memory slot may include a connector to receive a memory module and to couple the memory module to the memory bus. The system may include at least one switch electrically connected to the memory controller via the memory bus, where the switch is to isolate at least one memory slot from the memory bus.

    Abstract translation: 本文提供了与总线通道的修改相关的系统和方法。 该系统可以包括电连接到处理器的处理器和存储器控制器。 该系统可以包括存储器总线和经由存储器总线电连接到存储器控制器的存储器插槽。 每个存储器插槽可以包括用于接收存储器模块并将存储器模块耦合到存储器总线的连接器。 该系统可以包括经由存储器总线电连接到存储器控制器的至少一个开关，其中开关将至少一个存储器插槽与存储器总线隔离。

    STATUS SIGNAL COMBINED ONTO POWER VOLTAGE
    15.
    发明申请
    STATUS SIGNAL COMBINED ONTO POWER VOLTAGE 审中-公开
    状态信号组合在电源上

    公开(公告)号：WO2016171680A1

    公开(公告)日：2016-10-27

    申请号：PCT/US2015/027028

    申请日：2015-04-22

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： BENEDICT, Melvin K.

    IPC: G11C5/14 ,  G11C16/06

    CPC classification number: G11C5/14 ,  G11C5/04 ,  G11C5/147

    Abstract: An electronic device includes a power pin to receive a power voltage from a power supply. A controller is to determine whether a status signal combined onto the power voltage is received through the power pin, and indicate a health of the power supply based on the determining.

    Abstract translation: 电子设备包括从电源接收电源电压的电源引脚。 控制器用于确定通过电源引脚是否接收到组合在电源电压上的状态信号，并且基于确定来指示电源的健康状况。

    TRANS-FABRIC INSTRUCTION SET FOR A COMMUNICATION FABRIC
    16.
    发明申请
    TRANS-FABRIC INSTRUCTION SET FOR A COMMUNICATION FABRIC 审中-公开
    用于通信织物的转化织物指令集

    公开(公告)号：WO2016068903A1

    公开(公告)日：2016-05-06

    申请号：PCT/US2014/062849

    申请日：2014-10-29

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： BENEDICT, Melvin K. ,  KRAUSE, Michael R. ,  WRIGHT, Mitchel E.

    IPC: G06F13/14

    CPC classification number: G06F13/1668 ,  G06F15/7821 ,  H04L47/70

    Abstract: A memory controller of a sender node issues an instruction of a trans-fabric instruction set of instructions to a receiver node across a communication fabric that supports memory semantic operations, to cause a given transaction to be performed at the receiver node in response to the issued instruction.

    Abstract translation: 发送器节点的存储器控​​制器通过支持存储器语义操作的通信结构向接收器节点发出反结构指令集指令，以使得在接收器节点处响应于发出的指令执行给定的事务 指令。

    COMMUNICATION USING PHASE MODULATION OVER AN INTERCONNECT
    17.
    发明申请
    COMMUNICATION USING PHASE MODULATION OVER AN INTERCONNECT 审中-公开
    通过互连使用相位调制的通信

    公开(公告)号：WO2016171681A1

    公开(公告)日：2016-10-27

    申请号：PCT/US2015/027029

    申请日：2015-04-22

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： BENEDICT, Melvin K.

    IPC: H04L27/18

    CPC classification number: H04L27/20 ,  H04L27/22

    Abstract: An interconnect is provided between a requester device and a storage subsystem, the requester device and the storage subsystem to communicate over the interconnect using phase modulation that varies a phase of a signal on the interconnect for respective different values of data communicated over the interconnect.

    Abstract translation: 在请求者设备和存储子系统之间提供互连，请求者设备和存储子系统通过互连使用相位调制进行通信，所述相位调制改变互连上的信号的相位，用于通过互连通信的各个不同的数据值。

    TRANSFERRING A VARIABLE DATA PAYLOAD
    18.
    发明申请
    TRANSFERRING A VARIABLE DATA PAYLOAD 审中-公开
    传输一个可变的数据载荷

    公开(公告)号：WO2016122466A1

    公开(公告)日：2016-08-04

    申请号：PCT/US2015/013144

    申请日：2015-01-27

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： WARNES, Lidia ,  BENEDICT, Melvin K.

    IPC: G06F11/10 ,  G06F12/08

    CPC classification number: G06F11/10 ,  G06F11/1064 ,  G06F12/08 ,  G06F12/0804 ,  G06F12/0862 ,  G06F2212/1016

    Abstract: Transferring a variable data payload includes receiving a data payload command to transfer a variable data payload from a memory controller to a memory device, determining, based on a size of the variable data payload, a number of cache lines for the variable data payload, assigning the variable data payload to the number of cache lines, and transferring each of the cache lines with a cyclic redundancy check (CRC) character from the memory controller to the memory device.

    Abstract translation: 传送可变数据有效载荷包括接收数据有效载荷命令以将可变数据有效载荷从存储器控制器传送到存储器设备，基于可变数据有效载荷的大小确定用于可变数据有效载荷的高速缓存行的数量，分配 所述可变数据有效载荷与所述高速缓存行数量相关联，并且将具有循环冗余校验（CRC）字符的每个所述高速缓存行从所述存储器控制器传送到所述存储器设备。

    COMPUTING RESOURCE WITH MEMORY RESOURCE MEMORY MANAGEMENT
    19.
    发明申请
    COMPUTING RESOURCE WITH MEMORY RESOURCE MEMORY MANAGEMENT 审中-公开
    具有记忆资源记忆管理的计算资源

    公开(公告)号：WO2016085461A1

    公开(公告)日：2016-06-02

    申请号：PCT/US2014/067247

    申请日：2014-11-25

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： WRIGHT, Mitchel E. ,  KRAUSE, Michael R. ,  BARRON, Dwight L. ,  BENEDICT, Melvin K.

    IPC: G06F12/00

    CPC classification number: G06F12/1027 ,  G06F12/023 ,  G06F12/0292 ,  G06F2212/1041 ,  G06F2212/68

    Abstract: In an example implementation according to aspects of the present disclosure, a computing system includes a memory resource having a plurality of memory resource regions and a plurality of computing resources. The plurality of computing resources are communicatively coupleable to the memory resource. Each computing node may include a native memory management unit to manage a native memory on the computing resource and a memory resource memory management unit to manage the memory resource region of the memory resource associated with the computing resource.

    Abstract translation: 在根据本公开的方面的示例实现中，计算系统包括具有多个存储器资源区域和多个计算资源的存储器资源。 多个计算资源可通信地耦合到存储器资源。 每个计算节点可以包括用于管理计算资源上的本地存储器的本地存储器管理单元和用于管理与计算资源相关联的存储器资源的存储器资源区域的存储器资源存储器管理单元。

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