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公开(公告)号:DE1549767A1
公开(公告)日:1971-07-29
申请号:DE1549767
申请日:1967-06-01
Applicant: IBM
Inventor: CUTAIA ALFRED
Abstract: 1,201,164. Character recognition. INTERNATIONAL BUSINESS MACHINES CORP. 14 Nov., 1967 [15 Dec., 1966], No. 51668/67. Heading G4R. Apparatus for indicating errors in scanning characters in a character recognition system in which each character is expected to be scanned in a preselected number of scans, compares the total number of scans taken to complete the scanning of a word with the expected total number to derive an error count, an error being indicated if there is a predetermined difference between the error count and a reference number. In a first embodiment, a word (row of characters) is subjected to a series of vertical scans. Initially and after each character (or character portion mistakenly taken as a character, or smear satisfying a minimum character requirement) the contents of a pitch register specifying the expected number of scans per character are loaded into a scan counter which is then decremented by one each scan until it reaches zero or the end of the next character is reached, whichever occurs first. If the latter occurs first, the scan counter is then decremented by one each bit time until it reaches zero. For each pulse counted by the scan counter between character end and its reaching zero (whichever occurs first), a pulse is counted by an error counter at the same time. The error counter thus accumulates the sum (over all characters) of the signed difference between the expected and actual numbers of scans for the character. Whether the pulses are counted up or down depends on the agreement or disagreement between the sign of this "difference" and the sign of the current contents of the error counter (indicated by a sign latch) respectively, so that the error counter produces the sum stated. When a word latch is reset, an error latch is set if the contents of the error counter exceed a predetermined multiple (fraction) of the contents of the pitch register. The error latch is also set at any time the error counter reaches capacity. The word latch is set on detection of minimum character requirement, and reset on detection of a field bar (end of word), or if minimum character requirement is absent when the scan counter reaches zero (blank character) or if the recognition circuit indicates an incorrect character (smear) at the beginning of the word. The error counter takes no account of such a smear, or of the first character apparently needing too few scans as a consequence of the fact that for it the scan counter is loaded at the character beginning rather than at the end of the preceding character (in this case non-existent). A second embodiment differs in that the number of scans in the word so far is counted and the difference of this and the expected number of scans (obtained by multiplying the contents of the pitch register by a count of the number of characters including blank characters detected so far) is continually compared with a multiple of the contents of the pitch register. If the former exceeds the latter at the end of the word, the error latch is set. The error latch is also set if at any time the difference of actual and expected numbers of scans gets sufficiently large.
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公开(公告)号:DE1474351A1
公开(公告)日:1969-11-06
申请号:DEJ0027623
申请日:1965-03-04
Applicant: IBM
Inventor: CUTAIA ALFRED
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公开(公告)号:DE1816355A1
公开(公告)日:1969-07-31
申请号:DE1816355
申请日:1968-12-21
Applicant: IBM
Inventor: CUTAIA ALFRED
Abstract: 1,242,607. Character recognition. INTERNATIONAL BUSINESS MACHINES CORP. 29 Nov., 1968 [3 Jan., 1968], No. 56892/68. Heading G4R. In pattern scanning apparatus, data signals from a raster scan are consolidated in a selected direction, and detection of predetermined combinations of features in the consolidated data signals causes adjustment of the raster position in a direction at right angles to the selected direction. A character in a line of characters is scanned by a raster of vertical parallel lines to obtain data bits (32 per scan line) which are shifted into a one column (scan line) shift register, each bit being ORed with the correspondinglypositioned bit already in the register to develop a horizontal projection of the character. In case the raster overlaps the next line of characters above or below, the number of black-towhite and white-to-black transitions in the projection is counted in a sequence counter (preset to one), the nature (black or white) of the lowest bit in the projection is stored in a flip-flop, and a black bit counter counts the number of black bits in a black bar (series of consecutive black bits) in the projection to determine if the number lies between 8 and 25, then decrements the count with each black bit in a second bar (if present) to determine which bar is the longer (result stored in a sign flip-flop) and whether the modulus of the difference of the lengths exceeds 3. Logic circuitry responds to these indications and to the shift register direct to cause the raster to move up or down to centre on the character, the shift register being ring-shifted down or up respectively correspondingly, its direct connections to the logic circuitry terminating the movement at the appropriate time.
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公开(公告)号:DE1537186A1
公开(公告)日:1971-03-04
申请号:DE1537186
申请日:1967-10-27
Applicant: IBM
Inventor: CUTAIA ALFRED
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公开(公告)号:DE1474044A1
公开(公告)日:1968-12-05
申请号:DE1474044
申请日:1964-08-28
Applicant: IBM
Inventor: CUTAIA ALFRED
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