公开(公告)号：GB2324678A

公开(公告)日：1998-10-28

申请号：GB9804618

申请日：1998-03-05

Applicant: IBM

Inventor： DELP GARY SCOTT ,  FIROIU VICTOR ,  GUERIN ROCH A ,  LEICHTY PHILIP LYNN ,  POULTER DAVID RICHARD ,  PERIS VINOD GERARD JOHN ,  RAJAN RAJENDRAN ,  SHAFFER JOHN HANDLEY

IPC: H04Q3/00 ,  H04L12/56 ,  H04Q11/04

Abstract: A method and apparatus are provided for scheduling the transmission of cells of a plurality of data streams in a communications network. An earliest deadline first (EDF) scheduler is provided for scheduling the transmission of cells of a plurality of data streams in a communications network to ensure that the connection or data stream with the earliest deadline is transmitted first. Each of the multiple data streams has a delay bound or deadline. Data of each data stream is enqueued to a corresponding data cell queue. A timing wheel time slot based on an identified target transmission time for each data cell queue is calculated utilizing an addition of a maximum delay value. A move forward timing mechanism includes a scan forward feature to identify a succession of virtual connection or data stream cell queues for transmission. A multiple tier cell scheduler is provided that includes at least two scheduling timing wheels. The priority of a first timing wheel is higher than the priority of a second timing wheel. The priority of the second timing wheel is higher than the priority of an optional third timing wheel. The third timing wheel includes a best effort operational mode. The relative rates between data streams are maintained, while the absolute rates of the data streams are increased or decreased in the lowest priority wheel.

公开(公告)号：DE69332532T2

公开(公告)日：2003-10-02

申请号：DE69332532

申请日：1993-02-23

Applicant: IBM

Inventor： AUERBACK RICHARD ALLAN ,  BLADES JERRY ALLAN ,  BYRN JONATHAN WILLIAM ,  DELP GARY SCOTT

IPC: H04L12/56 ,  H04L29/06

Abstract: A method and a system in a distributed data processing network for enhancing the processing of a plurality of related data packets received at a receiving station (100) within the distributed data processing network, each of the data packets having a header associated herewith includes sequentially receiving a number of data packets at the receiving station. Next, the header associated with a first data packet is examined and a predicted profile is generated for comparison with a related subsequent data packet. The next data packet received is then compared with the predicted profile to determine whether or not the two data packets may be consolidated.

公开(公告)号：AT229248T

公开(公告)日：2002-12-15

申请号：AT93480010

申请日：1993-02-23

Applicant: IBM

Inventor： AUERBACK RICHARD ALLAN ,  BLADES JERRY ALLAN ,  BYRN JONATHAN WILLIAM ,  DELP GARY SCOTT

IPC: H04L12/56 ,  H04L29/06

Abstract: A method and a system in a distributed data processing network for enhancing the processing of a plurality of related data packets received at a receiving station (100) within the distributed data processing network, each of the data packets having a header associated herewith includes sequentially receiving a number of data packets at the receiving station. Next, the header associated with a first data packet is examined and a predicted profile is generated for comparison with a related subsequent data packet. The next data packet received is then compared with the predicted profile to determine whether or not the two data packets may be consolidated.

公开(公告)号：GB2324679B

公开(公告)日：2001-11-28

申请号：GB9804624

申请日：1998-03-05

Applicant: IBM

Inventor： DELP GARY SCOTT ,  LEICHTY PHILIP LYNN

IPC: H04Q3/00 ,  H04L12/56 ,  H04Q11/04

Abstract: A method and apparatus are provided for scheduling the transmission of cells of a plurality of data streams in a communications network. A best effort scheduler is provided for scheduling the transmission of cells of a plurality of data streams in a communications network. The best effort scheduler includes a best effort operational mode and can include more than one timing wheel. When the best effort scheduler includes more than one timing wheel, then the priority of the best effort timing wheel is lower than the priority of the other timing wheel or wheels. Data of each data stream is enqueued to a corresponding data cell queue. A target next transmission time for each data cell queue is calculated utilizing predetermined logical channel descriptor parameters. A lower priority or a higher priority timing wheel is selected and a timing wheel time slot is calculated based on an identified target transmission time for each active data cell queue. An active indication is set for the identified timing wheel time slot and an entry is stored to point to the corresponding data cell queue for the identified timing wheel time slot. The relative rates between data streams are maintained, while the absolute rates of the data streams are increased or decreased in the low priority wheel. Scheduling opportunities can be defined utilizing a predefined pseudo data cell queue. Then the calculation of the target transmission time for each data cell queue includes the predefined pseudo data cell queue, and the identified target transmission time for the predefined pseudo data cell queue defines scheduling opportunities of multiple timing wheel time slots.

公开(公告)号：GB2324679A

公开(公告)日：1998-10-28

申请号：GB9804624

申请日：1998-03-05

Applicant: IBM

Inventor： DELP GARY SCOTT ,  LEICHTY PHILIP LYNN

IPC: H04Q3/00 ,  H04L12/56 ,  H04Q11/04

Abstract: A method and apparatus are provided for scheduling the transmission of cells of a plurality of data streams in a communications network. A best effort scheduler is provided for scheduling the transmission of cells of a plurality of data streams in a communications network. The best effort scheduler includes a best effort operational mode and can include more than one timing wheel. When the best effort scheduler includes more than one timing wheel, then the priority of the best effort timing wheel is lower than the priority of the other timing wheel or wheels. Data of each data stream is enqueued to a corresponding data cell queue. A target next transmission time for each data cell queue is calculated utilizing predetermined logical channel descriptor parameters. A lower priority or a higher priority timing wheel is selected and a timing wheel time slot is calculated based on an identified target transmission time for each active data cell queue. An active indication is set for the identified timing wheel time slot and an entry is stored to point to the corresponding data cell queue for the identified timing wheel time slot. The relative rates between data streams are maintained, while the absolute rates of the data streams are increased or decreased in the low priority wheel. Scheduling opportunities can be defined utilizing a predefined pseudo data cell queue. Then the calculation of the target transmission time for each data cell queue includes the predefined pseudo data cell queue, and the identified target transmission time for the predefined pseudo data cell queue defines scheduling opportunities of multiple timing wheel time slots.

公开(公告)号：BR9200413A

公开(公告)日：1992-10-13

申请号：BR9200413

申请日：1992-02-06

Applicant: IBM

Inventor： CHANG PAUL ,  DELP GARY SCOTT ,  MELEIS HANAFY EL-SAYED ,  MONTALVO RAFAEL MANTILLA ,  SEIDMAN DAVID ISRAEL ,  TANTAWY AHMED NASR-EL-DIN ,  ZUMBO DOMINICK ANTHONY

IPC: G06F13/00 ,  G06F5/06 ,  G06F13/12 ,  G06F13/38 ,  H04L12/18 ,  H04L12/56 ,  H04L29/10 ,  G06F3/00

Abstract: A generic high bandwidth adapter providing a unified architecture for data communications between buses, channels, processors, switch fabrics and/or communication networks. Data is carried by data stream packets of variable lengths, and each packet includes a header control information portion required by communication protocols used to mediate the information exchange, and normally a data portion for the data which is to be communicated. The generic high bandwidth adapter comprises a processor subsystem including a processor for processing the header control information portions of data packets. The processor has access to data packets stored in a packet memory which stores data packets arriving at four generic adapter input/output ports. The packet memory is segmented into a plurality of buffers, and each data packet is stored in one or more buffers as required by the length thereof. A generic adapter manager is provided for performing and synchronizing generic adapter management functions, including implementing data structures in the packet memory by organizing data packets in buffers, and organizing data packets into queues for processing by the processor subsystem or transfer to or from generic adapter input/output ports. Each generic adapter input/output port has associated therewith a packet memory interface providing for the transfer of data packets into and out of the packet memory, such that when a data packet is received at an input/output port, the data packet is transferred into the adapter packet memory and queued for processing.