公开(公告)号：CA942855A

公开(公告)日：1974-02-26

申请号：CA45252

申请日：1969-03-11

Applicant: IBM

Inventor： HOFFMAN HARRY S JR ,  SAIA JERRY

IPC: G05F3/22 ,  H03F1/30 ,  H03F1/32 ,  H03F3/18 ,  H03F3/195 ,  H03F3/343 ,  H03F3/347 ,  H03H11/40

Abstract: 1,256,736. Transistor circuits. INTERNATIONAL BUSINESS MACHINES CORP. 12 March, 1969 [15 March, 1968], No. 12907/69. Heading H3T. [Also in Division G3] The collector of each transistor 10, 12, Fig. 2, of a complementary pair is connected to the base of the other transistor and is also connected to a respective diode 15, 17, to form a three terminal network 22, 23, 25 (or 21, 24, 25, Fig. 3, not shown). The diodes may be the functions of further transistors (Figs. 1b, 1c, not shown) and each transistor 10, 12 may be replaced by a complementary pair (Fig. 1a, not shown) in which the collector of one is joined to the emitter of the other, and the base of the one to the collector of the other. Circuits employing this three terminal network are: (a) An impedance converter (Fig. 4, not shown) in which a voltage is applied (at 25) and the impedance between a terminal (22) and ground is negative and proportional to the impedance Z R between another terminal (23) and ground; (b) A voltage regulator (Fig. 5, not shown) in which a voltage is applied (at 25), a reference voltage (at 23), a start-up diode (33) is connected in the reverse direction across diode (15) and a diode (37) is connected between the output terminals (22) and 23 for overvoltage protection, the voltage across a load R1 connected at 22 being regulated. In an alternative regulator (Fig. 8, not shown) two complete networks as in Fig. 2 are connected in cascade. If I 0 rises due to a fall in load impedance R1, then the positive feedback of the circuit further increases I 0 to keep V 0 unchanged; (c) A current generator (Fig. 6, not shown) in which the current through the common terminal (25) is regulated by a reference voltage applied (at 23) through an impedance R5, the terminal (22) being grounded; (d) A differential amplifier (Fig. 7, not shown) in which a voltage is applied through impedance Rb to one terminal (25) while the voltages to be compared are applied to another terminal (at 22) and through an impedance Z r (at 23), the output Vb appearing (at 25).