Abstract:
PROBLEM TO BE SOLVED: To prevent the part electrically connected with scanning signal lines or gate electrodes from being exposed to a liquid crystal layer or an alignment layer even when using a PEP saving process. SOLUTION: A common display signal line Dm is connected to an image electrode A11 and an image electrode B11. A 1st TFT M1 and a 2nd TFT M2 are connected in series across the image electrode A11 and the display signal line Dm. A 3rd TFT is connected across the image electrode B11 and the display signal line Dm. The 1st TFT M1 and the 3rd TFT M3 use the scanning signal line Gn+1 as their gate electrode. Moreover, the 2nd TFT M2 uses the scanning signal line Gn+2' branching from the scanning signal line Gn+2 as its gate electrode. The scanning signal lines Gn+1 and Gn+2' are arranged in parallel in the display area. COPYRIGHT: (C)2004,JPO
Abstract:
PROBLEM TO BE SOLVED: To provide a picture display device capable of enhancing display quality and the like. SOLUTION: The picture display device is made to have constitution in which reference voltages Vref - A, Vref - B are changed over in time division manner in a pixel electrode A1 and a pixel electrode B1 whose pixel structures are different. COPYRIGHT: (C)2003,JPO
Abstract:
PROBLEM TO BE SOLVED: To provide a display signal supplying method which is suited to the display device of an active matrix system for giving electric potential to adjacent pixels of two or more from one line of a display signal line with a time- division manner. SOLUTION: In this picture display device, a signal control circuit 5 is provided with an input memory controller 51, a FIFO-A 52 as a first storage device, a FIFO-B 53 as a second storage device, an output memory controller 54 and an XY timing generator 55. The FIFO-A 52 and the FIFO-B 53 whose storage capacity is larger than that of the FIFO-A 52 are memories having first-in and first-out functions. The display device makes the video data A stored in the FIFO-A 52 to be outputted in preference to the video data B stored in the FIFO-B 53 as to the video data A and the video data B inputted in a first horizontal period from the outside. COPYRIGHT: (C)2003,JPO
Abstract:
PROBLEM TO BE SOLVED: To easily decrease occurrence of brightness unevenness and flickering without problems in productivity and costs. SOLUTION: An output waveform of a potential outputted from a switching part 16 of a gate driver IC 7 to scanning lines G is set as a waveform including a 1st waveform which has a potential to bring a switching element into ON state as the amplitude, and a 2nd waveform which follows the 1st waveform, and also oscillates within a period shorter than the 1st waveform with an amplitude smaller than the 1st waveform. Thus, the falling waveforms of the scanning signals to be supplied to the switching elements via the scanning lines G are made to beforehand decline, to relax the unevenness of the declinations of the falling waveforms of the scanning signals to be supplied to each switching element, and thereby suppress occurrence of brightness unevenness and flickering in a screen. COPYRIGHT: (C)2003,JPO
Abstract:
PURPOSE: To eliminate signal delay of a common electrode in a liquid crystal display device of an active matrix system. CONSTITUTION: Columns 78 of a color filter 32 are provided to specify a cell gap between an array board 12 with a storage capacity line 28 and an opposed board 72 with the color filter 32, and a common electrode 30 that covers the columns 78 of the color filter 32 is electrically connected to the storage capacity line 28 on the array board 12 to feed electric potential from the storage capacity line 28 to the common electrode 30. A transfer dotting process can thereby be eliminated, and signal delay of the common electrode 30 can be eliminated. In addition, the cell gap does not differ depending on a place by fixing the columns 78 of the color filter 32, which results in improving image quality besides keeping the uniformity of an image plane. Cost can be also reduced by dispensing with the transfer dotting process and a spacer dispersing process.
Abstract:
PROBLEM TO BE SOLVED: To provide a display device which has a multiple-signal line for transmitting a display signal to multiple pixels in one pixel array. SOLUTION: The display device having a display area, including multiple pixels arranged in matrix, has in the display area multiple scanning lines (G) for selecting respective pixel rows, the multiple-signal line (D) for sending the display signal to at least two pixels in one pixel row selected by a scanning line, and a selection line (E) arranged separately from the scanning lines and the selection line selects at least one of the pixels in the pixel row, to which the multiple-signal line sends the display signal.
Abstract:
PROBLEM TO BE SOLVED: To provide a liquid crystal display element in which the number of data lines and the number of data/drivers are reduced equal to or less than one half without increasing the size of a switching element. SOLUTION: A first TFT M1 which controls the supply of display signals to a pixel electrode A1, a second TFT M2 which is connected to the TFT M1 and a third TFT M3 which is connected to a data line Dm and controls the supply of display signals to a pixel electrode B1 are provided. Moreover, the TFTs M2 and M3 are connected to a gate line Gn+1 and the TFT M1 is connected to a gate line Gn+2.
Abstract:
PROBLEM TO BE SOLVED: To provide this device with a structure which allows a high numerical aperture and high image quality to be compatible with each other in an IPS(in- plane switching) mode TFT(thin-film transistor) liquid crystal display device. SOLUTION: This device is comprised of plural pairs of common wiring 2 and gate wiring 3 extending in parallel with each other in one direction, plural source wiring 4 extending in parallel with each other in the direction crossing these common wiring and the gate lines, pixel opening parts 5 enclosed by the common wiring, gate wiring, and source wiring, and TFTs 6. In this case, a source electrode 11 and a drain electrode 12 are arranged in parallel with each other. Moreover, this device is to be structured, so that the width direction of a channel 13 formed of the parallel source electrodes 11 and drain electrodes 12 is parallel to the source wiring, and also, the channel width is about the same as the long side length of the pixel opening part.
Abstract:
PROBLEM TO BE SOLVED: To provide an information processor in which adjusting effect of a viewing angle width is improved by controlling gradation of a liquid crystal display (LCD) device, a display control method, and a program for executing the display control method with which a viewing angle characteristic is controlled. SOLUTION: The information processor includes second software for forwarding display control of the LCD panel from a CPU 12 to first software after receiving a display mode change instruction, and a plurality of display control table 38 in which color pallet data of less than 128 gradation levels are allocated with degeneration for a higher gradation level. From an identification data of the LCD panel which is acquired by the first or the second software to which the control is forwarded, a degeneration color conversion table corresponding to the identification data is retrieved. A display adapter 30 reads out the degeneration color conversion table retrieved from a display control table storing section 36 to a look-up-table (LUT) reading section 40 and generates an RGB signal in which the gradation is degenerated. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To drive a display device of a multiplex pixel structure by only simple control, and further simplify the structure of a gate driver. SOLUTION: An image display device 1 is provided with a plurality of pixel electrodes, a plurality of scanning lines G for supplying scanning signals to turn on and off these pixel electrodes, a pulse generation part 9 for generating a shift pulse, a buffer B to be arranged correspondingly to each of scanning lines G, and a shift register unit 12 in which 1st and 2nd shift registers SR1, SR2 are alternately cascade-connected. The shift pulse is propagated through the 1st and 2nd shift registers SR1, SR2 by outputting the shift pulse to the shift register parts from the pulse generation part 9, so that the shift pulse is thereby propagated between a buffer B and an adjacent buffer B in one horizontal scanning cycle. COPYRIGHT: (C)2003,JPO