公开(公告)号：DE2817430A1

公开(公告)日：1978-11-02

申请号：DE2817430

申请日：1978-04-21

Applicant: IBM

Inventor： MONEDA FRANCISCO H DE LA ,  KOTECHA HARISH N

IPC: H01L21/033 ,  H01L21/28 ,  H01L21/285 ,  H01L21/74 ,  H01L21/768 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/417 ,  H01L29/45 ,  H01L29/78 ,  H01L21/20 ,  H01L21/306

公开(公告)号：FR2365248A1

公开(公告)日：1978-04-14

申请号：FR7722463

申请日：1977-07-13

Applicant: IBM

Inventor： MONEDA FRANCISCO H DE LA ,  KOTECHA HARISH N

IPC: H01L21/822 ,  H01L21/82 ,  H01L21/8238 ,  H01L27/04 ,  H01L27/088 ,  H01L27/092 ,  H01L29/78 ,  H03K17/687 ,  H03K19/094 ,  H03K19/0944 ,  H03K19/0948 ,  H03K19/40 ,  H03K19/08 ,  H01L21/70 ,  H01L27/06

Abstract: An insulated Gate Field Effect Transistor (IGFET) static inverter having an improved load line characteristic is disclosed. The inverter comprises an enhancement mode IGFET active device in a first portion of a semiconductor substrate, having its drain connected to an output node, its source connected to a source potential and its gate connected to an input signal source. The first portion of the substrate is connected to a first substrate potential. A depletion mode IGFET load device is located in a second portion of the semiconductor substrate which is electrically isolated from the first portion. The depletion mode load device has its drain connected to a drain potential and its source, gate and the second portion of the semiconductor substrate all connected to the output node. In this manner, the rise in the source-to-substrate voltage bias during the turn-off transition is eliminated in the depletion mode load device, providing an improved load current characteristic for the inverter. Alternate embodiments are disclosed directed to an all N-channel inverter, an all P-channel inverter, and a complementary inverter consisting of a P-channel load device and an N-channel active device.