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公开(公告)号:GB1036644A
公开(公告)日:1966-07-20
申请号:GB2009464
申请日:1964-05-14
Applicant: IBM
Inventor: OWEN CHARLES EDWARD
IPC: G06F9/26
Abstract: 1,036,644. Electric digital calculators. INTERNATIONAL BUSINESS MACHINES CORPORATION. March 31, 1965 [May 14, 1964], No. 20094/64. Heading G4A. In a data processer comprising a control store storing both micro-instructions and a table of information, a control cycle reads out a microinstruction which may initiate a table look-up cycle to read information from the table. Addition by table look-up, digit by digit, is described. The control store may be a read-only store as in Specification 985,347 which is referred to.
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公开(公告)号:GB983952A
公开(公告)日:1965-02-24
申请号:GB323861
申请日:1961-01-27
Applicant: IBM
Inventor: OWEN CHARLES EDWARD , PROUDMAN ANTHONY , HUFFELL JOHN GEORGE WILLIAM
Abstract: 983, 952. Read-only stores. INTERNATIONAL BUSINESS MACHINES CORPORATION. Jan. 11,1962 [Jan. 27, 1961], No. 3238/61. Heading G4A. [Also in Divisions H1 and H3] A read-only memory used e.g. in storing microprograms consists in a set of ferrite cores C 0 C 1 . . . acting as pulse transformers arranged on the periphery of a disc with primary windings on selected subsets of the cores connected each between a pair of conductors taken one from each of two groups of drive conductors mounted on the disc. The two groups of drive conductors consist of radial conductors R N printed on the top surface of the disc and annular conductors AN printed on a lamination of the disc (Fig. 2). Terminals 9 project through the surface of the disc from conductors AN and receive one end of the primary windings. The other ends are attached to terminals 10 which are connected to the radial conductors R N through diodes D. There are three forms which the ferrite cores might take. In Fig. 1 U-shaped ferrites are each mounted with the limbs projecting from a recess in the periphery of the disc. The primaries are wound to pass between the limbs if the core is to be energized or to pass over a post 4 if the core is to be skipped. Ferrite bars bridge the limbs and are held in position by clips 3 attached to the posts 4. As shown in Fig. 3 the disc periphery carries nylon bushes 14 having projections 14a about which the primaries are wound. After this has been done a ferrite bar 16 is inserted and is capped by a U-shape ferrite member 18 held in place by a clip 17. In a third embodiment the cores may comprise teeth formed from a solid ferrite block comprising the disc periphery and grooved to accommodate the primaries. The cores are capped by ferrite bars as in Fig. 1
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公开(公告)号:DE1257836B
公开(公告)日:1968-01-04
申请号:DEJ0030873
申请日:1966-05-20
Applicant: IBM
Inventor: OWEN CHARLES EDWARD , FORD CHANDLERS
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公开(公告)号:GB1085528A
公开(公告)日:1967-10-04
申请号:GB3264364
申请日:1964-08-11
Applicant: IBM
Inventor: OWEN CHARLES EDWARD
Abstract: 1,085,528. Electric digital calculators. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 17, 1965 [Aug. 11, 1964], No. 32643/64. Heading G4A. In a calculator, corresponding-order digits of two operands are added in a full-adder, the result being modified or not in accordance with its value and the radix used and then fed back to the adder input via a delay line which together with the adder and modifier forms a calculation loop holding in series the digits of the operands and result. Fig. 2 shows a circuit for multiplying two binary-coded decimal operands A, B, applied serially by bit, to get a result C, by halving and doubling. The sum output of the adder 1 is passed to first and second four-bit shift registers 3, 4 to the latter 4 via a second fulladder 2 which adds the filler digit 6. Halving is done by shifting from the penultimate stage of the first register 3 to get three bits and taking the fourth bit from the carry output of the first adder 1. If the ignored bit in the first register 3 is 1, ten is added into the first adder 1. Doubling is done by applying the digit to both inputs of the first adder 1, the result being passed to the (magnetostrictive) delay line 13 from the first or second register 3, 4 depending on whether the first adder 1 produced a carry. The decimal digit distribution of the operands A, B and result C in the calculation loop is as follows: . . . CBCBCBAAA . . . A (early end) most significant A digit and least significant B and C digits first. A slight modification to perform sequential multiplication A x B = C, C x D = E, &c. is described briefly. Fig. 5 (not shown) shows means for inserting digits from punched cards into the appropriate positions of the calculation loop and printing out digits from the loop. A counter scans a matrix in synchronism with the loop circulation, the matrix gating pulses from the card reader into the loop at the appropriate times for read in, and actuating print drivers when the appropriate digits in the loop agree with digit identifying signals from the card mechanism for print out. Fig. 6 (not shown) shows an embodiment for performing calculations of the form on serial-by-bit signed binary-coded-decimal operands by halving and doubling and successive subtraction and addition. A delay line, with a digit distribution as follows: DB . . . DBDBACAC . . . AC (early end) least significant digits first, feeds a series combination of a first four bit shift register, a first adder/subtracter, a second register and a second adder/subtracter, the latter feeding the delay line. Provision is made for carry to/ borrow from the next decimal digit, and for addition of filler digit when there is a carry from the first adder or when a carry would be generated from the 8-bit of the first adder output by addition of the filler.
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公开(公告)号:GB1055261A
公开(公告)日:1967-01-18
申请号:GB2650462
申请日:1962-07-10
Applicant: IBM
Inventor: OWEN CHARLES EDWARD , PROUDMAN ANTHONY
IPC: G11C17/04
Abstract: 1,055,261. Read-only stores. INTERNATIONAL BUSINESS MACHINES CORPORATION. July 4, 1963 [July 10, 1962]. No. 26504/62. Heading G4A. In read-only memories in which a capacitive or other connection is made between selected drive and sense lines from sets of such lines the invention provides that there is a constant impedance to current in the drive line whatever the form of the stored data. This is done in Fig. 2 (not shown) by providing pairs of sense lines both lines of a pair being connected to a differential amplifier. One bits are stored by connecting the lines S1a, S2a to appropriate drive lines, and zero bits by connecting the lines S1b, S2b to the drive lines. Fig. 3 (not shown) shows pairs of drive and sense lines. Ones are stored by connecting the d drive lines to the p sense lines and the b drive lines to the q sense lines and zeroes by making the opposite connections. To pulse a drive line a transistor from the set G1 to GN is sent conductive after which a transistor T1 or T2 . . . is pulsed. The invention is also applicable to inductive readonly stores.
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公开(公告)号:GB1013099A
公开(公告)日:1965-12-15
申请号:GB3028364
申请日:1964-07-31
Applicant: IBM
Inventor: OWEN CHARLES EDWARD
Abstract: 1,013,099. Magnetic storage devices. INTERNATIONAL BUSINESS MACHINES CORPORATION. July 31, 1964, No. 30283/64. Heading H1T. [Also in Division H3] A digital data storage device comprises a drive conductor 1, part of which is encircled by an anisotropic magnetic film 2, a conductive layer 3 encircling part of the circumference of film 2 and being covered by a second anisotropic magnetic film 4 which extends beyond the ends of conductive layer 3 to form, with film 2, closed magnetic paths parallel to and around the axis of conductor 1. The easy directions of films 2 and 4 are parallel to the axis of conductor 1 and the whole is surrounded by curved, seriesconnected, sensing conductors 5 which may be printed or crossed wires. To write information a bit drive current in conductors 5 is applied during the application of a word drive current in conductor 1 the word drive current terminating very quickly before the induced currents, produced in the conductive layer 3 by the termination of the bit drive carried in 5, have died away. An information flux then exists around the magnetic circuit 2, 4 parallel to the axis of conductor 1. Data is read out by a short pulse in conductor 4 which disturbs the flux passing through films 2 and 4, some of which (6) then links conductors 5 and so produces an output. In a matrix the films 2 and 4 may be continuous along the drive wire 1 (see Division H3).
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公开(公告)号:GB999752A
公开(公告)日:1965-07-28
申请号:GB2752660
申请日:1960-08-09
Applicant: IBM
Inventor: OWEN CHARLES EDWARD , PEACOCK ANTONY , TAUB DANIEL MATTHEW
IPC: G06F9/26
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公开(公告)号:DE2246251A1
公开(公告)日:1973-03-29
申请号:DE2246251
申请日:1972-09-21
Applicant: IBM
Inventor: TAUB DANIEL MATTHEW , OWEN CHARLES EDWARD
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