公开(公告)号：GB2530962A

公开(公告)日：2016-04-06

申请号：GB201601479

申请日：2014-07-01

Applicant: IBM

Inventor： STEINMACHER-BUROW BURKHARD

IPC: G06F12/0895 ,  G06F9/38 ,  G06F12/0806

Abstract: The present invention relates to a method for implementing a bit array (318) in a cache line (211) of a memory system (128) that includes a memory storage (208) and a controller (206), the method comprising configuring in the cache line (211) the bit array (318), the bit array comprising array of bits, wherein the configuring further comprises defining a value of each bit in the bit array, receiving, by the controller (206), a request (210) for an operation on the bit array wherein the request is indicative of a location of the cache line (211) in the memory storage (208) and information specifying the request; identifying,by the controller (206),for the operation one or more actions on the bit array (318) using the information, wherein the one or more actions are encoded in the controller (206); and in response to receiving the request, performing the request by executing the one or more encoded actions.

公开(公告)号：GB2522650A

公开(公告)日：2015-08-05

申请号：GB201401654

申请日：2014-01-31

Applicant: IBM

Inventor： STEINMACHER-BUROW BURKHARD

IPC: H05K1/14 ,  H05K1/02

Abstract: The invention relates to a computer system 212 comprising a multitude of printed circuit boards 10, each printed circuit board comprising one or more processor chips 12, 30 attached to said printed circuit board, wherein the number of printed circuit boards is an even number greater than or equal to 4, wherein said printed circuit boards are arranged in two groups 14, 16, each group 14, 16 being arranged in a different stacking direction 50, 52, and wherein the one or more processor chips 12 which are attached to each one of the printed circuit boards 10 of one of the groups are connected for communication to the processor chips 30 of each printed circuit board of the other group. The groups of boards maybe stacked orthogonally to each other. The circuit boards may have memory device that can connect with the processors. The invention further relates to a method for connecting and communicating across a multitude of printed circuit boards 10. There is a computer program for connecting and communicating across a number of PCBs.

公开(公告)号：GB2516091A

公开(公告)日：2015-01-14

申请号：GB201312443

申请日：2013-07-11

Applicant: IBM

Inventor： STEINMACHER-BUROW BURKHARD

IPC: G06F12/08 ,  G06F7/76 ,  G06F12/0875

Abstract: A memory system 128 has a memory controller 206 and cache memory 208. The metadata 213 and elements 215 of a dynamic array are stored in a cache line 211. The metadata may include parameters, such as the size of the elements in the array and the number of elements in the array. It may also include enable flags for the parameters. The controller receives requests for operations on the dynamic array. The operation may be carried out atomically with respect to operations requested by other threads. The operation indicates the location of the array in the cache. The operation may push or pop the a selected element of the array, request the number of elements in the array, return a specific element of the array, set a specific element of an array to a value return the minimum or maximum value in the array.