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公开(公告)号:JP2000259510A
公开(公告)日:2000-09-22
申请号:JP6654799
申请日:1999-03-12
Applicant: IBM
Inventor: SUGAWARA TAKASHI , KOMIYAMA HIROHIDE , HANAMI HIDENOBU
Abstract: PROBLEM TO BE SOLVED: To easily analyze the fault of an information processing system by examining a transaction on a primary side bus from the connector or slot of a bus bridge circuit in the manner of no destruction. SOLUTION: A jumper 60 is arranged as a control input means for switching the operating mode of a card bus controller 42, bidirectional bypass routes 40A, 66 and 58A are arranged parallel to the controller 42, the operation of the controller 42 is enabled/disabled and the operation of the bypass route is disabled/enabled corresponding to the inactive/active state of a pass through mode signal 64 from the jumper 60. A prescribed signal on a PCI bus signal line 40A or signal on a card bus signal line 58A corresponding to the prescribed signal is outputted through the bypass route onto a card bus or PCI bus as it is. In order to examine the transaction on the PCI bus, a PCI bus analyzer or exerciser is connected to a PC card slot 44A to which the bypass route is connected.
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公开(公告)号:JPH11110332A
公开(公告)日:1999-04-23
申请号:JP24886397
申请日:1997-09-12
Applicant: IBM
Inventor: SUGAWARA TAKASHI , KOMIYAMA HIROHIDE
Abstract: PROBLEM TO BE SOLVED: To achieve both of connection failure and identification by using the minimum number of pins in a connector that is used for connection. SOLUTION: This external equipment has a 1st identification pin group that consists of more than one pin on the side of one edge in the longitudinal direction of connecting connectors 21A to C, a 2nd identification pin group that comprises more than two pins on the side of the other edge and a control pint that is allocated to one pin of one edge side and connects at least one pin in the 2nd identification pin group to the control pin, and also, each pin in other 1st and 2nd identification pin groups forms identification information through its connection or disconnection to/from the control pin. When a 1st signal level is supplied to the control pin on the external device side, if any of the 2nd identification pin group shows the 1st signal level, both ends of a connector normally come into contact. Also, an external device can be identified by the combination of the signal level of each pin of the 1st and 2nd identification pin groups.
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