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公开(公告)号:US10262896B2
公开(公告)日:2019-04-16
申请号:US15659507
申请日:2017-07-25
Applicant: IMEC VZW
Inventor: Silvia Armini
IPC: H01L21/4763 , H01L23/48 , H01L21/768 , H01L23/522 , H01L23/532 , C23C16/02 , C23C16/04 , C23C16/34 , C23C16/56
Abstract: A use of an amine-containing silane for forming a transition metal nitride is provided. In this use, the amine of the amine-containing silane is the source of at least some, preferably most and most preferably all of the nitrogen present in the transition metal nitride.
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公开(公告)号:US20180047621A1
公开(公告)日:2018-02-15
申请号:US15659507
申请日:2017-07-25
Applicant: IMEC VZW
Inventor: Silvia Armini
IPC: H01L21/768 , H01L23/522 , H01L23/532
CPC classification number: H01L21/76843 , C23C16/0272 , C23C16/045 , C23C16/34 , C23C16/56 , H01L21/76877 , H01L23/5226 , H01L23/53238
Abstract: A use of an amine-containing silane for forming a transition metal nitride is provided. In this use, the amine of the amine-containing silane is the source of at least some, preferably most and most preferably all of the nitrogen present in the transition metal nitride.
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公开(公告)号:US09685322B2
公开(公告)日:2017-06-20
申请号:US14488857
申请日:2014-09-17
Applicant: IMEC VZW
Inventor: Christoph Adelmann , Silvia Armini
IPC: H01L21/469 , H01L21/02 , H01L29/06
CPC classification number: H01L21/02318 , H01L21/02046 , H01L21/02052 , H01L21/02107 , H01L21/02112 , H01L21/02118 , H01L21/0226 , H01L21/02299 , H01L21/02304 , H01L29/06
Abstract: The present disclosure relates to a method (100) for depositing a layer on a III-V semiconductor substrate, in which this method comprises providing (102) a passivated III-V semiconductor substrate comprising a III-V semiconductor surface which has a surface passivation layer provided thereon for preventing oxidation of said III-V semiconductor surface. The surface passivation layer comprises a self-assembled monolayer material obtainable by the reaction on the surface of an organic compound of formula R-A, wherein A is selected from SH, SeH, TeH and SiX3. X is selected from H, Cl, O—CH3, O—C2H5, and O—C3H2, and R is a hydrocarbyl, fluorocarbyl or hydrofluorocarbyl comprising from 5 to 20 carbon atoms. The method further comprises thermally annealing (107) the III-V semiconductor substrate in a non-oxidizing environment such as to decompose the self-assembled monolayer material, and depositing (108) a layer on the III-V semiconductor surface in the non-oxidizing environment.
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公开(公告)号:US20170141199A1
公开(公告)日:2017-05-18
申请号:US15345782
申请日:2016-11-08
Applicant: IMEC VZW
Inventor: Steven Demuynck , Zheng Tao , Boon Teik Chan , Liesbeth Witters , Marc Schaekers , Antony Premkumar Peter , Silvia Armini
IPC: H01L29/417 , H01L21/311 , H01L29/45 , H01L29/08 , H01L21/768 , H01L21/285 , H01L21/02 , H01L21/3105
CPC classification number: H01L29/41791 , H01L21/02115 , H01L21/02123 , H01L21/02164 , H01L21/0217 , H01L21/02178 , H01L21/02186 , H01L21/0228 , H01L21/28518 , H01L21/28556 , H01L21/28562 , H01L21/31053 , H01L21/31111 , H01L21/76802 , H01L21/76843 , H01L21/76877 , H01L21/76886 , H01L21/76897 , H01L29/0847 , H01L29/45 , H01L29/66795 , H01L29/785
Abstract: A method for fabricating a semiconductor structure is provided. The method includes providing a patterned substrate comprising a semiconductor region and a dielectric region. A conformal layer of a first dielectric material is deposited directly on the patterned substrate. A layer of a sacrificial material is deposited overlying the conformal layer of the first dielectric material. The sacrificial material is patterned, whereby a part of the semiconductor region remains covered by the patterned sacrificial material. A layer of a second dielectric material is deposited on the patterned substrate, thereby completely covering the patterned sacrificial material. A recess is formed in the second dielectric material by completely removing the patterned sacrificial material. The exposed conformal layer of the first dielectric material is removed selectively to the semiconductor region.
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公开(公告)号:US09437488B2
公开(公告)日:2016-09-06
申请号:US14939286
申请日:2015-11-12
Applicant: IMEC VZW
Inventor: Boon Teik Chan , Silvia Armini , Frederic Lazzarino
IPC: H01L21/4763 , H01L21/768 , H01L21/311 , H01L21/321 , H01L21/3105 , H01L23/532
CPC classification number: H01L21/76877 , H01L21/31053 , H01L21/31144 , H01L21/3212 , H01L21/76808 , H01L21/76814 , H01L21/76816 , H01L21/7682 , H01L21/76831 , H01L21/76832 , H01L21/7684 , H01L21/76843 , H01L21/76852 , H01L21/76871 , H01L21/76885 , H01L23/53238 , H01L2221/1026 , H01L2221/1063 , H01L2924/0002 , H01L2924/00
Abstract: A method is provided for fabricating a semiconductor device that includes providing a structure with a sacrificial layer having at least one through-hole exposing a metal surface and, optionally, an oxide surface. In one example, the method may include applying a self-assembled monolayer selectively on the exposed metal surface and/or on the oxide surface. The method may also include growing a metal on the self-assembled monolayer and on the exposed metal surface if no self-assembled monolayer is present thereon, so as to fill the at least one through-hole, thereby forming at least one metal structure. The method may further include replacing the first sacrificial layer by a replacement dielectric layer having a dielectric constant of at most 3.9.
Abstract translation: 提供了一种用于制造半导体器件的方法,该半导体器件包括提供具有牺牲层的结构,所述牺牲层具有暴露金属表面和任选地氧化物表面的至少一个通孔。 在一个实例中,该方法可以包括在暴露的金属表面和/或氧化物表面上选择性地应用自组装单层。 该方法还可以包括在自组装单层上和暴露的金属表面上生长金属,如果不存在自组装单层,以便填充至少一个通孔,从而形成至少一个金属结构。 该方法还可以包括通过介电常数至多为3.9的置换介电层代替第一牺牲层。
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公开(公告)号:US20160155664A1
公开(公告)日:2016-06-02
申请号:US14939286
申请日:2015-11-12
Applicant: IMEC VZW
Inventor: Boon Teik Chan , Silvia Armini , Frederic Lazzarino
IPC: H01L21/768 , H01L23/532 , H01L21/3105 , H01L21/311 , H01L21/321
CPC classification number: H01L21/76877 , H01L21/31053 , H01L21/31144 , H01L21/3212 , H01L21/76808 , H01L21/76814 , H01L21/76816 , H01L21/7682 , H01L21/76831 , H01L21/76832 , H01L21/7684 , H01L21/76843 , H01L21/76852 , H01L21/76871 , H01L21/76885 , H01L23/53238 , H01L2221/1026 , H01L2221/1063 , H01L2924/0002 , H01L2924/00
Abstract: A method is provided for fabricating a semiconductor device that includes providing a structure with a sacrificial layer having at least one through-hole exposing a metal surface and, optionally, an oxide surface. In one example, the method may include applying a self-assembled monolayer selectively on the exposed metal surface and/or on the oxide surface. The method may also include growing a metal on the self-assembled monolayer and on the exposed metal surface if no self-assembled monolayer is present thereon, so as to fill the at least one through-hole, thereby forming at least one metal structure. The method may further include replacing the first sacrificial layer by a replacement dielectric layer having a dielectric constant of at most 3.9.
Abstract translation: 提供了一种用于制造半导体器件的方法,该半导体器件包括提供具有牺牲层的结构,所述牺牲层具有暴露金属表面和任选地氧化物表面的至少一个通孔。 在一个实例中,该方法可以包括在暴露的金属表面和/或氧化物表面上选择性地应用自组装单层。 该方法还可以包括在自组装单层上和暴露的金属表面上生长金属,如果不存在自组装单层,以便填充至少一个通孔,从而形成至少一个金属结构。 该方法还可以包括通过介电常数至多为3.9的置换介电层代替第一牺牲层。
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公开(公告)号:US09117666B2
公开(公告)日:2015-08-25
申请号:US14555356
申请日:2014-11-26
Applicant: IMEC VZW , Katholieke Universiteit Leuven, KU LEUVEN R&D
Inventor: Quoc Toan Le , Mikhail Baklanov , Yiting Sun , Silvia Armini
IPC: H01L21/469 , H01L21/02
CPC classification number: H01L21/02359 , H01L21/02126 , H01L21/02203 , H01L21/02343 , H01L21/3105 , H01L21/76814 , H01L21/76826 , H01L21/76831
Abstract: A method is provided for activating an exposed surface of a porous dielectric layer, the method comprising the steps of: filling with a first liquid at least the pores present in a part of the porous dielectric layer, the part comprising the exposed surface, removing the first liquid selectively from the surface, activating the exposed surface, and removing the first liquid from the bulk part of the porous dielectric layer.
Abstract translation: 提供一种用于激活多孔电介质层的暴露表面的方法,该方法包括以下步骤:至少填充第一液体至少存在于多孔电介质层的一部分中的孔,该部分包括暴露表面,去除 第一液体从表面选择性地起作用,激活暴露的表面,以及从多孔介电层的本体部分去除第一液体。
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公开(公告)号:US20250118547A1
公开(公告)日:2025-04-10
申请号:US18906944
申请日:2024-10-04
Applicant: IMEC VZW
Inventor: Sana Rachidi , Geert Van den Bosch , Maarten Rosmeulen , Silvia Armini
IPC: H01L21/02 , H01L21/3105 , H01L21/764 , H01L21/768
Abstract: According to an aspect, a method of forming a memory structure for a 3D NAND flash memory includes forming a layer stack over a substrate, forming first recessed areas in a sidewall surrounding a memory hole in the layer stack by laterally etching back gate layers of the layer stack from the memory hole, and forming a lateral memory stack in each first recessed areas, by depositing a blocking oxide and, subsequently, a charge trap material. The method also includes forming second recessed areas in the sidewall by laterally etching back the inter-gate spacer layers from the memory hole and forming dummy layers in the second recessed areas. The method also includes lining the sidewall of the memory hole with a liner layer, subjecting the dummy layers to a thermal treatment process adapted to convert each dummy layer into an air gap structure, and forming a tunneling oxide layer in the memory hole, along the liner layer, and a channel layer along the tunneling oxide layer.
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公开(公告)号:US10553480B2
公开(公告)日:2020-02-04
申请号:US15970636
申请日:2018-05-03
Applicant: IMEC VZW
Inventor: Murad Redzheb , Silvia Armini
IPC: H01L21/768 , H01L21/02 , H01L21/321 , H01L23/522 , H01L23/532
Abstract: The present disclosure relates to a method for selectively forming a dielectric material on a first area of a top surface of a substrate. In an embodiment, the method involves providing the substrate including the top surface, the top surface including the first area and a second area, the first area having a hydrophilicity characterized by a water contact angle of at least 45° and the second area having a hydrophilicity characterized by a water contact angle of less than 40°. The method also involves providing a precursor aqueous solution on the substrate, the precursor aqueous solution including: a solvent, a dielectric material precursor, a catalyst for forming a dielectric material from the dielectric material precursor, and an ionic surfactant. Further, the method involves removing the solvent.
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公开(公告)号:US20180323102A1
公开(公告)日:2018-11-08
申请号:US15970636
申请日:2018-05-03
Applicant: IMEC VZW
Inventor: Murad Redzheb , Silvia Armini
IPC: H01L21/768 , H01L23/522 , H01L23/532
Abstract: The present disclosure relates to a method for selectively forming a dielectric material on a first area of a top surface of a substrate. In an embodiment, the method involves providing the substrate including the top surface, the top surface including the first area and a second area, the first area having a hydrophilicity characterized by a water contact angle of at least 45° and the second area having a hydrophilicity characterized by a water contact angle of less than 40°. The method also involves providing a precursor aqueous solution on the substrate, the precursor aqueous solution including: a solvent, a dielectric material precursor, a catalyst for forming a dielectric material from the dielectric material precursor, and an ionic surfactant. Further, the method involves removing the solvent.
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