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公开(公告)号：US10736246B2
公开(公告)日：2020-08-04
申请号：US16146501
申请日：2018-09-28
Applicant: Intel Corporation
Inventor： Jaejin Lee , Chung-Hao Chen , Hao-Han Hsu , Xiang Li , Jun Liao
Abstract: An electromagnetic interference (EMI) shielding can be couplable to a circuit board. The EMI shielding can include a fence couplable to the circuit board, a lid couplable to the fence, and a shield arm extending from the lid and being configured to couple to the fence. The shield arm can be hingedly or rotatably coupled to the lid. The shield arm can be magnetically couplable to the lid. The shield arm and/or the fence can include a magnet to provide a magnetic attraction between the shield arm and the fence.
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公开(公告)号：US10530174B2
公开(公告)日：2020-01-07
申请号：US15088277
申请日：2016-04-01
Applicant: Intel Corporation
Inventor： Jaejin Lee , Chung-Hao J. Chen , Zhen Yao , Songnan Yang , Jonathan Rosenfeld , Sreenivas Kasturi
Abstract: Techniques for focusing an energy radiated by a wireless power transmitting unit are described. An example power transmitting unit includes a transmit coil configured to generate a magnetic field to wirelessly power a device within an active wireless charging area. The power transmitting unit also includes a power generating circuitry to deliver a current to the transmit coil to generate the magnetic field. The power transmitting unit also includes a patch array disposed in parallel with the transmit coil to reduce a strength of the magnetic field at frequencies outside of the operating frequency during operation of the power transmitting unit.
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公开(公告)号：US20180175795A1
公开(公告)日：2018-06-21
申请号：US15381902
申请日：2016-12-16
Applicant: Intel Corporation
Inventor： Hao-Han Hsu , Jaejin Lee , Chung-Hao Chen
CPC classification number: H03B5/36 , H03B5/1243 , H03B5/1265 , H03B5/1293 , H03B5/32 , H03B2200/0088 , H03H1/00 , H03H1/0007 , H03L7/00 , H03L7/185
Abstract: An apparatus is provided which comprises: an oscillator circuit to generate a clock signal and transmit the clock signal over a signal line; a ground reference plane associated with the signal line; and one or more patterns formed in the ground reference plane, wherein the one or more patterns in the ground reference plane is to filter out noise from the clock signal transmitted over the signal line.
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公开(公告)号：US20180122748A1
公开(公告)日：2018-05-03
申请号：US15335999
申请日：2016-10-27
Applicant: Intel Corporation
Inventor： Hao-Han Hsu , Ying Ern Ho , Jaejin Lee
CPC classification number: H01L23/562 , H01L23/498 , H01L23/552 , H01L23/66 , H01L2223/6644 , H01L2223/6677
Abstract: Embodiments herein may relate to a package with one or more layers. A silicon die may be coupled with the one or more layers via an adhesive. A package stiffener may also be coupled with the adhesive adjacent to the die. A magnetic thin film may be coupled with the package stiffener. Other embodiments may be described and/or claimed.
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公开(公告)号：US20210327782A1
公开(公告)日：2021-10-21
申请号：US17359085
申请日：2021-06-25
Applicant: Intel Corporation
Inventor： Dong-Ho Han , Jaejin Lee , Jerrod Peterson , Kyle Arrington
IPC: H01L23/373 , H01L23/60 , H01L23/552 , H01L23/528
Abstract: Methods and apparatus are disclosed to provide electrical shielding for integrated circuit packages using a thermal interface material. An integrated circuit package includes a substrate including a ground plane layer and a solder mask; a semiconductor die attached to the substrate, the solder mask layer separating the semiconductor die from the ground plane layer; and a thermal interface material surrounding at least a portion of the semiconductor die, the thermal interface material electrically coupled to the ground plane layer.
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Patent Agency Ranking
公开(公告)号：US20210144844A1
公开(公告)日：2021-05-13
申请号：US17154551
申请日：2021-01-21
Applicant: Intel Corporation
Inventor： Jaejin Lee , Min Suet Lim , Luis Paniagua Acuna , Tin Poay Chuah
Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to a shielding layer to be inserted under an inductor footprint to mitigate the impact of electromagnetic interference (EMI) onto electrical traces beneath the shielding layer and under the inductor footprint. In embodiments, the electrical traces may be high-speed input/output (HSIO) traces that may be particularly susceptible to data corruption given the level of EMI. In embodiments, the shielding layer may be a high density metallization shield within dielectric stack-up layers. In embodiments, these layers may use unique via patterns or shaped metal preform shields to enable routing under an inductor at a higher layer of the PCB. Other embodiments may be described and/or claimed.
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17.发明授权公开(公告)号：US10938161B2
公开(公告)日：2021-03-02
申请号：US16370665
申请日：2019-03-29
Applicant: Intel Corporation
Inventor： Jaejin Lee , Jun Liao , Xiang Li , Christopher E. Cox
IPC: H01R13/6595 , H01R13/6581 , H05K9/00 , H05K1/11 , H01R12/72 , H01R13/6596 , H05K1/18
Abstract: A device includes a printed circuit board (PCB) and a shield for the PCB. The shield can reduce high frequency electromagnetic frequency (EMF) noise generated by one or more components of the PCB. The PCB includes pads to interface with a corresponding connector. For example, for a dual inline memory module (DIMM) PCB, the PCB includes pads to insert into a DIMM connector. The shield includes a gap in its perimeter that aligns with clips in the corresponding connector. The gaps will correspond to similar features of the PCB that interface with the corresponding connector to allow the shield to attach to the PCB. The shield includes lock fingers to extend from a connector-facing edge of the shield to interface with the corresponding connector to align the shield with the corresponding connector.
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公开(公告)号：US20200107476A1
公开(公告)日：2020-04-02
申请号：US16146501
申请日：2018-09-28
Applicant: Intel Corporation
Inventor： Jaejin Lee , Chung-Hao Chen , Hao-Han Hsu , Xiang Li , Jun Liao
Abstract: An electromagnetic interference (EMI) shielding can be couplable to a circuit board. The EMI shielding can include a fence couplable to the circuit board, a lid couplable to the fence, and a shield arm extending from the lid and being configured to couple to the fence. The shield arm can be hingedly or rotatably coupled to the lid. The shield arm can be magnetically couplable to the lid. The shield arm and/or the fence can include a magnet to provide a magnetic attraction between the shield arm and the fence.
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公开(公告)号：US20190288421A1
公开(公告)日：2019-09-19
申请号：US16431498
申请日：2019-06-04
Applicant: Intel Corporation
Inventor： Jong-Ru Guo , Yunhui Chu , Jun Liao , Kai Xiao , Jingbo Li , Yuanhong Zhao , Mo Liu , Beomtaek Lee , James A. McCall , Jaejin Lee , Xiaoning Ye , Zuoguo Wu , Xiang Li
Abstract: Embodiments may relate to a connector. The connector may include a plurality of connector pins that are to communicatively couple an element of a printed circuit board (PCB) with an element of an electronic device when the element of the PCB and the element of the electronic device are coupled with the connector. The connector may also include an active circuit that is communicatively coupled with a pin of the plurality of pins. The active circuit may be configured to match an impedance of the element of the PCB with an impedance of the element of the electronic device. Other embodiments may be described or claimed.
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公开(公告)号：US10418940B2
公开(公告)日：2019-09-17
申请号：US15381902
申请日：2016-12-16
Applicant: Intel Corporation
Inventor： Hao-Han Hsu , Jaejin Lee , Chung-Hao Chen
Abstract: An apparatus is provided which comprises: an oscillator circuit to generate a clock signal and transmit the clock signal over a signal line; a ground reference plane associated with the signal line; and one or more patterns formed in the ground reference plane, wherein the one or more patterns in the ground reference plane is to filter out noise from the clock signal transmitted over the signal line.
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