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公开(公告)号:US20180145042A1
公开(公告)日:2018-05-24
申请号:US15359926
申请日:2016-11-23
Applicant: INTEL CORPORATION
Inventor: Min Suet Lim , Chin Lee Kuan , Eng Huat Goh , Khang Choong Yong , Bok Eng Cheah , Jackson Chung Peng Kong , Howe Yin Loo
IPC: H01L23/64 , H01L23/498 , H01L21/48 , H01L21/56 , H01L23/31
CPC classification number: H01L23/645 , H01L21/4853 , H01L21/56 , H01L21/563 , H01L23/3157 , H01L23/49811 , H01L23/49816
Abstract: A device and method of utilizing spiral interconnects for voltage and power regulation are shown. Examples of spiral interconnects include air core inductors. An integrated circuit package attached to a motherboard using spiral interconnects is shown. Methods of attaching an integrated circuit package to a motherboard using spiral interconnects are shown including air core inductors. Methods of attaching spiral interconnects include using electrically conductive adhesive or solder.
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公开(公告)号:US09904321B2
公开(公告)日:2018-02-27
申请号:US14778070
申请日:2014-11-12
Applicant: INTEL CORPORATION
Inventor: Thorsten Meyer , Dirk Plenkers , Hans-Joachim Barth , Bernd Waidhas , Yen Hsiang Chew , Kooi Chi Ooi , Howe Yin Loo
CPC classification number: G06F1/163 , B29C39/021 , B29C39/10 , B29C65/4825 , B29L2031/3481 , G02C5/143 , G02C11/10
Abstract: Embodiments of wearable electronic devices, components thereof, and related systems and techniques are disclosed herein. For example, a wearable electronic device may include a wearable support structure having a first surface and a second surface; a first electrode located at the first surface, wherein, when the wearable electronic device is worn by a user on a portion of the user's body, the first electrode is arranged to contact the user's skin in the portion of the user's body; a second electrode located at the second surface, wherein, when the wearable electronic device is worn by a user on the portion of the user's body, the second electrode is arranged to not contact the user's skin in the portion of the user's body; and a resistance switch having first and second input terminals coupled to the first and second electrodes, respectively. Other embodiments may be disclosed and/or claimed.
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公开(公告)号:US20230409084A1
公开(公告)日:2023-12-21
申请号:US18458919
申请日:2023-08-30
Applicant: Intel Corporation
Inventor: Chee Chun Yee , David W. Browning , Bok Eng Cheah , Jackson Chung Peng Kong , Min Suet Lim , Howe Yin Loo , Poh Tat Oh
CPC classification number: G06F1/1652 , G06F1/1641 , G06F1/1643 , G06F1/1626 , G06F1/1675 , G06F3/041 , G06F2203/04102
Abstract: A computing device includes a flexible display screen, a housing to house at least one processor device and at least one memory element, and a first wing to support a side portion of the display screen. The front face of the housing includes a center portion of the display screen. The first wing is connected to the housing by a hinge, the first wing configured to swivel about an axis defined by the hinge. The hinge is configured to lock the first wing in at least two wing positions, a first of the wing positions supports the side portion of the display screen in a first orientation, a second of the wing positions supports the side portion of the display screen in a second orientation, and the side portion of the display screen is active in the first orientation and hidden in the second orientation.
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公开(公告)号:US11355427B2
公开(公告)日:2022-06-07
申请号:US16095916
申请日:2016-07-01
Applicant: Intel Corporation
Inventor: Howe Yin Loo , Sujit Sharan , Tin Poay Chuah , Ananth Prabhakumar
IPC: H01L23/498 , H01L23/13 , H01L23/14 , H01L23/31 , H01L21/48 , H01L21/768 , H05K1/18 , H01L25/065
Abstract: Techniques and mechanisms to facilitate connectivity between circuit components via a substrate. In an embodiment, a microelectronic device includes a substrate, wherein a recess region extends from the first side of the substrate and only partially toward a second side of the substrate. First input/output (IO) contacts of a first hardware interface are disposed in the recess region. The first IO contacts are variously coupled to each to a respective metallization layer of the substrate, wherein the recess region extends though one or more other metallization layers of the substrate. In another embodiment, the microelectronic device further comprises second IO contacts of a second hardware interface, the second IO contacts to couple the microelectronic device to a printed circuit board.
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公开(公告)号:US10153253B2
公开(公告)日:2018-12-11
申请号:US15357233
申请日:2016-11-21
Applicant: Intel Corporation
Inventor: Howe Yin Loo , Eng Huat Goh , Min Suet Lim , Bok Eng Cheah , Jackson Chung Peng Kong , Khang Choong Yong
IPC: H01L25/065 , H01L23/498 , H01L25/16 , H01L25/00 , H05K1/11 , H05K3/30 , H05K3/36 , H05K1/14
Abstract: A system-in-package apparatus includes a package substrate configured to carry at least one semiconductive device on a die side and a through-mold via package bottom interposer disposed on the package substrate on a land side. A land side board mates with the through-mold via package bottom interposer, and enough vertical space is created by the through-mold via package bottom interposer to allow space for at least one device disposed on the package substrate on the land side.
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公开(公告)号:US10136516B2
公开(公告)日:2018-11-20
申请号:US15607612
申请日:2017-05-29
Applicant: INTEL CORPORATION
Inventor: Howe Yin Loo , Choong Kooi Chee
IPC: H05K7/10 , H05K7/12 , H05K1/18 , H01L23/13 , H01L23/367 , H01L23/498 , H05K3/30 , H01L25/065 , H05K1/14 , H05K3/34 , H01L23/427
Abstract: The present description relates to the field of fabricating microelectronic structures. The microelectronic structure may include a microelectronic substrate have an opening, wherein the opening may be formed through the microelectronic substrate or may be a recess formed in the microelectronic substrate. A microelectronic package may be attached to the microelectronic substrate, wherein the microelectronic package may include an interposer having a first surface and an opposing second surface. A microelectronic device may be attached to the interposer first surface and the interposer may be attached to the microelectronic substrate by the interposer first surface such that the microelectronic device extends into the opening. At least one secondary microelectronic device may be attached to the interposer second surface.
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公开(公告)号:US10085342B2
公开(公告)日:2018-09-25
申请号:US15376872
申请日:2016-12-13
Applicant: Intel Corporation
Inventor: Bok Eng Cheah , Jackson Chung Peng Kong , Khang Choong Yong , Min Suet Lim , Chin Lee Kuan , Howe Yin Loo
IPC: H01L21/00 , H01L23/48 , H05K1/16 , H01F17/02 , H01F17/00 , H01F41/04 , H01L23/498 , H01L21/48 , H01L23/00
CPC classification number: H05K1/165 , H01F17/0033 , H01F41/046 , H01L21/4857 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/645 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/73 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H01L2924/19042 , H05K2201/086
Abstract: A microelectronic device incorporating an air core inductor having one or more inserts to provide efficiency of the inductor are described. One or more inserts having a selected permeability may be placed within regions defined by coils of the air core inductor. The inserts can be formed of a solid material of the selected permeability or such a material can be applied to other structures, such as circuit components. Other embodiments may be described and/or claimed.
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公开(公告)号:US10083922B2
公开(公告)日:2018-09-25
申请号:US15359926
申请日:2016-11-23
Applicant: Intel Corporation
Inventor: Min Suet Lim , Chin Lee Kuan , Eng Huat Goh , Khang Choong Yong , Bok Eng Cheah , Jackson Chung Peng Kong , Howe Yin Loo
Abstract: A device and method of utilizing spiral interconnects for voltage and power regulation are shown. Examples of spiral interconnects include air core inductors. An integrated circuit package attached to a motherboard using spiral interconnects is shown. Methods of attaching an integrated circuit package to a motherboard using spiral interconnects are shown including air core inductors. Methods of attaching spiral interconnects include using electrically conductive adhesive or solder.
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公开(公告)号:US20180168043A1
公开(公告)日:2018-06-14
申请号:US15376872
申请日:2016-12-13
Applicant: Intel Corporation
Inventor: Bok Eng Cheah , Jackson Chung Peng Kong , Khang Choong Yong , Min Suet Lim , Chin Lee Kuan , Howe Yin Loo
CPC classification number: H05K1/165 , H01F17/0006 , H01F17/02 , H01F41/046 , H01L21/4846 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/645 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H01L2924/19042 , H05K2201/086
Abstract: A microelectronic device incorporating an air core inductor having one or more inserts to provide efficiency of the inductor are described. One or more inserts having a selected permeability may be placed within regions defined by coils of the air core inductor. The inserts can be formed of a solid material of the selected permeability or such a material can be applied to other structures, such as circuit components. Other embodiments may be described and/or claimed.
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公开(公告)号:USD773452S1
公开(公告)日:2016-12-06
申请号:US29539359
申请日:2015-09-14
Applicant: Intel Corporation
Designer: Bok Eng Cheah , Howe Yin Loo , Min Suet Lim , Jackson Chung Peng Kong , Poh Tat Oh
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