MAINTAINING HIGH TEMPORAL CACHE LOCALITY BETWEEN INDEPENDENT THREADS HAVING THE SAME ACCESS PATTERN

    公开(公告)号:US20190324757A1

    公开(公告)日:2019-10-24

    申请号:US15957695

    申请日:2018-04-19

    Abstract: Embodiments described herein provide techniques to maintain high temporal cache locality between independent threads having the same or similar memory access pattern. One embodiment provides a graphics processing unit comprising an instruction execution pipeline including hardware execution logic and a thread dispatcher to process a set of commands for execution and distribute multiple groups of hardware threads to the hardware execution logic to execute the set of commands. The thread dispatcher can be configured to concurrently distribute a first group of the multiple groups of hardware threads to the hardware execution logic and withhold distribution of additional hardware threads for the set of commands until after the first group completes execution.

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