Abstract:
This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re -usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.
Abstract:
According to one aspect of the disclosed subject matter, a monolithically isled solar cell is provided. The solar cell comprises a semiconductor layer having a light receiving frontside and a backside opposite the frontside and attached to an electrically insulating backplane. A trench isolation pattern partitions the semiconductor layer into electrically isolated isles on the electrically insulating backplane. A first metal layer having base and emitter electrodes is positioned on the semiconductor layer backside. A patterned second metal layer providing cell interconnection and connected to the first metal layer by via plugs is positioned on the backplane.
Abstract:
Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, attaching a prepeg backplane to the interdigitated pattern of base electrodes and emitter electrodes, forming holes in the prepeg backplane which provide access to the first layer of electrically conductive metal, and depositing a second layer of electrically conductive metal on the backside surface of the prepeg backplane forming an electrical interconnect with the first layer of electrically conductive metal through the holes in the prepeg backplane.
Abstract:
Laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, and metal ablation. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, that are either planar or textured/three-dimensional. These techniques are highly suited to thin crystalline semiconductor, including thin crystalline silicon films.
Abstract:
The disclosed subject matter provides a method and structure for obtaining ultra-low surface recombination velocities from highly efficient surface passivation in crystalline silicon substrate- based solar cells by utilizing a bi-layer passivation scheme which also works as an efficient ARC. The bi-layer passivation consists of a first thin layer of wet chemical oxide or a thin hydrogenated amorphous silicon layer. A second layer of amorphous hydrogenated silicon nitride film is deposited on top of the wet chemical oxide or amorphous silicon film. This deposition is then followed by annealing to further enhance the surface passivation.
Abstract:
Methods here disclosed provide for selectively coating the top surfaces or ridges of a 3-D substrate while avoiding liquid coating material wicking into micro cavities on 3-D substrates. The substrate includes holes formed in a three-dimensional substrate by forming a sacrificial layer on a template. The template includes a template substrate with posts and trenches between the posts. The steps include subsequently depositing a semiconductor layer and selectively etching the sacrificial layer. Then, the steps include releasing the semiconductor layer from the template and coating the 3-D substrate using a liquid transfer coating step for applying a liquid coating material to a surface of the 3-D substrate. The method may further include coating the 3-D substrate by selectively coating the top ridges or surfaces of the substrate. Additional features may include filling the micro cavities of the substrate with a filling material, removing the filling material to expose only the substrate surfaces to be coated, coating the substrate with a layer of liquid coating material, and removing said filling material from the micro cavities of the substrate.
Abstract:
A solar photovoltaic module laminate for electric power generation is provided. The module comprises a plurality of solar cells embedded within the module laminate and electrically interconnected to form at least one string of electrically interconnected solar cells within said module laminate. And at least one remote-access module switch (RAMS) power electronic circuit embedded within the module laminate electrically interconnected to and powered with said at least one string of electrically interconnected solar cells and serving as a remote-controlled module power delivery gate switch.
Abstract:
Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, forming electrically conductive emitter plugs and base plugs on the interdigitated pattern, and attaching a backplane having a second interdigitated pattern of base electrodes and emitter electrodes at the conductive emitter and base plugs to form electrical interconnects.
Abstract:
This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.
Abstract:
Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.