Abstract:
A quad 16 QAM transmission and reception methodology wherein a time domain pilot reference is advantageously associated therewith. There may be one or more such pilot references (402) for each packet of multiple 16 QAM pulses. Depending upon the embodiment, each 16 QAM pulse can include a time domain pilot reference, or an estimated pilot reference for that pulse can be determined either by reference to pilot references in other pulses sharing the same packet, or by reference to pilot references for other previously received 16 QAM pulses corresponding to that same pulse.
Abstract:
A quad 16 QAM transmission and reception methodology wherein a time domain pilot reference is advantageously associated therewith. There may be one or more such pilot references (402) for each packet of multiple 16 QAM pulses. Depending upon the embodiment, each 16 QAM pulse can include a time domain pilot reference, or an estimated pilot reference for that pulse can be determined either by reference to pilot references in other pulses sharing the same packet, or by reference to pilot references for other previously received 16 QAM pulses corresponding to that same pulse.
Abstract:
A phase corrected clock signal recovery circuit for multilevel digital signals includes a transition marker generator for generating a narrow width pulse each time a received multilevel digital signal crosses one of the threshold levels between the adjacent logic levels of multilevel signal. Picket fence-like pulse trains are thus formed, the pulses (transition markers) of which correspond to the threshold crossings of the received digital signal, The pulse trains are interspersed with spaces or eye intervals which correspond to the absence of any threshold crossings. Each eye interval additionally corresponds to the time during which each respective bit of digital signal information is transmitted. The rate of occurrence of the pulse trains is substantially equal to the clock frequency of the received digital signal. A phase error correction circuit is operatively coupled to the output of the transition marker generator and to an electronically tuned bandpass filter capable of adjusting the phase of the pulse trains. More specifically, the phase error detection circuit includes an up/down counter and adjusts the phase of the clock signal recovered from the pulse trains such that the number of transition markers generated during the high portion of the clock signal equals the number of transition markers generated during the low portion of the clock signal. Thus, selected transitory edges of the pulses of the recovered clock signal are centered at the middles of the respective eye intervals, that is, at the points in time when each respective bit of multilevel digital signal information occurs. This phase corrected recovered clock signal is conveniently applied to appropriate sampling circuitry to enable sampling of the multilevel digital signal at optimum times, that is, at the center of the eye intervals.
Abstract:
A method and apparatus for attenuating an interfering signal corrupting a desired Loran C signal is provided. An interfering signal sample is determined which occurs at the peak of the autocorrelation function of the interfering signal such that the period of the interferer is known. The sample occurring at the peak of the autocorrelation function is added to or subtracted from the desired Loran C signal sample taken at a predetermined reference point during the pulses thereof such that the interfering signal is cancelled or substantially attenuated.
Abstract:
The figure shows a base site (104) generating a pseudo-random signal based on at least one system parameter known to both the base site (104) and a communication unit (112). The base site transmitter (106) then transmits the pseudo-random signal to the communication unit via an idle communication resource (102). Upon receiving the pseudo-random signal by the receiver (114) of the communication unit (112) determines at least one characteristic of the idle communication resource (102) using the pseudo-random signal.
Abstract:
A digital Zero-IF Selectivity Section (DZISS) (20, 20'). The DZISS of the present invention teaches a topology that facilitates realization in both transmitter (20') and receivers (20). In the preferred low-speed embodiment, the digital filters (32, 32', 33, 33') are comprised of cascaded filter sections (64a-64d) employing decimation (66) to reduce the data rate. In the preferred high-speed embodiment, the digital filters (32, 32', 33, 33') are more sophisticated as at least the first filter section (64') is decomposed to enable high-speed operation. Decimation (66) is also employed on the high-speed embodiment to allow subsequent circuitry to operate at a lower data rate thus consuming less power. In an alternate embodiment, applicable to the low-speed and high-speed preferred embodiments, sections of the digital low pass filters (100A, 100B) are time multiplexed (104) effectuating a cost and space savings.
Abstract:
A range equalization transceiver system for increasing efficiency of a continuous duty communications link includes a first transceiver for transmitting data traffic over a broadband traffic channel and a second transceiver for determining routing information using a discovery channel based on link quality (figure 1). A controller is used for interpreting routing information from the second transceiver where the controller selects a transmitting scheme based on data traffic conditions on both the broadband traffic channel and link quality channel for sending data over a wireless network.
Abstract:
A system that includes a receiver (100) that is configured for: selecting (210) a set of demodulator output samples and a corresponding set of reference symbols each having a magnitude; generating (220) a set of raw channel estimates based on the set of demodulator output samples and the corresponding set of reference symbols; determining (230) a set of linearly-constrained filter coefficient parameters; and combining (240) the set of raw channel estimates with the set of linearly-constrained filter coefficient parameters to generate a channel estimate.
Abstract:
A method for implementing diversity reception to counteract effects of channel fading on a transmitted information signal. In diversity receive paths, estimates of complex channel gain are computed based upon pilot symbols inserted from time to time in the transmitted information symbol stream. Phase corrected and weighted samples from the diversity paths are summed prior to the decision process. The squared magnitudes of the diversity path channel gains are summed to provide the proper threshold adjustment.
Abstract:
A quad 16 QAM transmission and reception methodology wherein a time domain pilot reference is advantageously associated therewith. There may be one or more such pilot references for each packet of multiple 16 QAM pulses. Depending upon the embodiment, each 16 QAM pulse can include a time domain pilot reference, or an estimated pilot reference for that pulse can be determined either by reference to pilot references in other pulses sharing the same packet, or by reference to pilot references for other previously received 16 QAM pulses corresponding to that same pulse.