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公开(公告)号:US12113527B2
公开(公告)日:2024-10-08
申请号:US17886473
申请日:2022-08-12
Applicant: NANYA TECHNOLOGY CORPORATION
Inventor: Chang-Ting Wu
IPC: H03K19/00 , H03K19/0185
CPC classification number: H03K19/0005 , H03K19/018557
Abstract: An off-chip driver (OCD), including a pull-up driver and a pull-down driver, is provided. The pull-up driver and the pull-down driver are coupled to an output pad. One of the pull-up driver and the pull-down driver includes a main driving circuit, an auxiliary driving circuit, a connection circuit, and a common impedance. The main driving circuit is used to perform an output driving operation on the output pad, and the auxiliary driving circuit is used to selectively perform the output driving operation on the output pad. A first terminal of the common impedance is coupled to a driving terminal of the main driving circuit and a driving terminal of the auxiliary driving circuit through the connection circuit. A second terminal of the common impedance is coupled to the output pad.
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12.
公开(公告)号:US11705898B2
公开(公告)日:2023-07-18
申请号:US17153897
申请日:2021-01-21
Applicant: NANYA TECHNOLOGY CORPORATION
Inventor: Chang-Ting Wu
IPC: H03K17/042 , H03K3/012 , H01L21/8238
CPC classification number: H03K17/04206 , H01L21/8238 , H03K3/012
Abstract: An off chip driver circuit includes a first power rail, a second power rail, an input/output pad, a pull-up circuit, a pull-down circuit. The pull-up circuit is configured to selectively activate at least one of charging paths between the first power rail and the input/output pad. The pull-up circuit includes a first resistor and PMOS transistors arranged on the charging paths, and the first resistor is coupled between the first power rail and the PMOS transistors. The pull-down circuit is configured to selectively activate at least one of discharging paths between the second power rail and the input/output pad. The pull-down circuit includes a second resistor and NMOS transistors arranged on the discharging paths, and the second resistor is coupled between the second power rail and the NMOS transistors.
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公开(公告)号:US11463076B1
公开(公告)日:2022-10-04
申请号:US17361541
申请日:2021-06-29
Applicant: Nanya Technology Corporation
Inventor: Chang-Ting Wu
IPC: H03B1/00 , H03K3/00 , H03K5/1252 , H03K17/56 , G11C11/4096
Abstract: This invention provides a resistance-adjustable means using at a pull-up driver and/or a pull-down driver of an OCD circuit. When the resistance-adjustable means is applicable to the pull-up driver, the resistance-adjustable means includes a triode-mode PMOS coupled to a circuit of the pull-up driver and at least one of one or more adjustable resistors and/or a fixed resistor, which are connected in series and coupled to the triode-mode PMOS, and the at least one of the adjustable resistors or the fixed resistor is coupled to an IO (input/output) pad. When the resistance-adjustable means is applicable to the pull-down driver, a triode-mode NMOS is used to replace the triode-mode PMOS for the resistance-adjustable means.
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14.
公开(公告)号:US10756737B1
公开(公告)日:2020-08-25
申请号:US16581738
申请日:2019-09-24
Applicant: NANYA TECHNOLOGY CORPORATION
Inventor: Chang-Ting Wu
IPC: H03K19/018 , H03K19/0185 , H03K19/20
Abstract: An OCD circuit includes a pull-up circuit, a pull-down circuit, a first and a second compensation circuit. The pull-up circuit is enabled in response to an input data. The pull-down circuit is enabled in response to the input data. The first compensation circuit is coupled to the pull-up circuit and configured to induce a first compensation signal to the pull-up circuit in response to a first decision signal. The second compensation circuit is coupled to the pull-down circuit and configured to induce a second compensation signal to the pull-down circuit in response to a second decision signal. The first decision signal and the second decision signal are generated in response to the input data.
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公开(公告)号:US12190991B2
公开(公告)日:2025-01-07
申请号:US18154860
申请日:2023-01-16
Applicant: NANYA TECHNOLOGY CORPORATION
Inventor: Chang-Ting Wu
IPC: G11C7/10
Abstract: An off-chip driving device and a driving capability enhancement method thereof are provided. Detecting a rising edge and a falling edge of an input data signal. A first enhancement circuit is controlled to provide a first enhancement signal to an input/output pad according to the rising edge and the falling edge of the input data signal.
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公开(公告)号:US20240056077A1
公开(公告)日:2024-02-15
申请号:US17886473
申请日:2022-08-12
Applicant: NANYA TECHNOLOGY CORPORATION
Inventor: Chang-Ting Wu
IPC: H03K19/00 , H03K19/0185
CPC classification number: H03K19/0005 , H03K19/018557
Abstract: An off-chip driver (OCD), including a pull-up driver and a pull-down driver, is provided. The pull-up driver and the pull-down driver are coupled to an output pad. One of the pull-up driver and the pull-down driver includes a main driving circuit, an auxiliary driving circuit, a connection circuit, and a common impedance. The main driving circuit is used to perform an output driving operation on the output pad, and the auxiliary driving circuit is used to selectively perform the output driving operation on the output pad. A first terminal of the common impedance is coupled to a driving terminal of the main driving circuit and a driving terminal of the auxiliary driving circuit through the connection circuit. A second terminal of the common impedance is coupled to the output pad.
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公开(公告)号:US11894671B2
公开(公告)日:2024-02-06
申请号:US17838282
申请日:2022-06-13
Applicant: NANYA TECHNOLOGY CORPORATION
Inventor: Chang-Ting Wu
CPC classification number: H02H3/20 , H02H1/0007
Abstract: An electrical over stress protection device is provided. A detection circuit detects an input voltage from a pad, provides a first discharge path when the input voltage is higher than a preset voltage, and provides a turn-on voltage to a discharge protection circuit to control the discharge protection circuit to provide at least one second discharge path.
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公开(公告)号:US11677399B1
公开(公告)日:2023-06-13
申请号:US17567891
申请日:2022-01-04
Applicant: NANYA TECHNOLOGY CORPORATION
Inventor: Chang-Ting Wu
IPC: H03K3/00 , H03K19/00 , H03K19/0185 , H03K19/003
CPC classification number: H03K19/0016 , H03K19/0013 , H03K19/00315 , H03K19/018521
Abstract: The interface circuit includes a first transistor, a second transistor, a first switch, a first logic circuit and a second logic circuit. The first transistor is controlled by a enable signal. The second transistor is controlled by a first control signal. The first switch is coupled between a second end of the first transistor and the output end of the interface circuit, wherein the first switch is controlled by a second control signal. The first logic circuit generates the first control signal according to the enable signal and at least one indication signal. The second logic circuit generates the second control signal according to the first control signal and the enable signal.
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公开(公告)号:US11316512B2
公开(公告)日:2022-04-26
申请号:US17155046
申请日:2021-01-21
Applicant: NANYA TECHNOLOGY CORPORATION
Inventor: Chang-Ting Wu
Abstract: An off chip driving system includes a decision circuit, multiple first and second adjustable-enhancement circuits, and multiple first and second drivers. The decision circuit outputs a first and a second decision signal according to a clock and an input data. Each first adjustable-enhancement circuit generates one of first control signals in response to the first and the second decision signal and one of first optional signals. Each second adjustable-enhancement circuit generates one of second control signals in response to the first and the second decision signal and one of second optional signals. Each first driver is coupled to the corresponding first adjustable-enhancement circuit and configured to be enabled in response to the corresponding first control signal. Each second driver is coupled to the corresponding second adjustable-enhancement circuit and configured to be enabled in response to the corresponding second control signal.
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