公开(公告)号：JPH11145284A

公开(公告)日：1999-05-28

申请号：JP30764197

申请日：1997-11-10

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/768 ,  H01L21/312 ,  H01L21/316 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To prevent a delamination, or a thermal deformation and a breakage of an organic system insulation film by a method wherein, after a heating step of eliminating moisture included in a laminated insulation film is executed, a wiring material is continuously formed without exposing a substrate to-be- processed to the outer atmosphere. SOLUTION: Before a wiring material for a control plug 12 is buried in a connection hole, before a wiring material for an upper layer wiring 13 is formed, and before an upper layer cap inorganic system insulation film 8 is formed, a heating step is executed. Thus, moisture adsorbed in the inorganic system insulation film 8 and existing internally is eliminated. For this reason, if a wiring material and an interlayer insulation film are formed continuously without exposing a to-be-processed substrate 1 to the outer atmosphere thereafter, it disappears that moisture at a time of the heating step is evaporated. Accordingly, it is possible to prevent separation between an organic insulation film lacking stress-resistance and an inorganic insulation film, or a thermal deformation or a breakage of the organic insulation film.

公开(公告)号：JPH10256363A

公开(公告)日：1998-09-25

申请号：JP5941397

申请日：1997-03-13

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/768

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device wherein, when a groove or via hole is formed on a porous dielectrics film, the adsorption of gas to the porous dielectrics film is prevented. SOLUTION: Relating to a method for manufacturing a semiconductor device, firstly, a porous dielectrics film 4 is formed on a silicon oxide film 2. Then, an insulating film 7 is formed on the porous dielectrics film 4. Then, laser beam or electron beam is emitted from above the insulating film 7 to form a void part comprising the same pattern as a wiring pattern on the porous dielectrics film 4. Here, a condensed layer 6 is formed. Then, on the insulating film 7, an opening part 9 comprising the same pattern as the pattern of void part of the porous dielectrics film 4 is formed, and a wiring groove 10 comprising the same pattern as the wiring pattern is formed. Lastly, a metal is embedded in the wiring groove 10 to form a metal wiring 8. Here, the porous dielectrics film is made of porous silicon resin or porous polyfluoroethylene group resin. The insulating film 7 comprises a silicon oxide film, silicon nitride film, or organic low-dielectric-constant film.

公开(公告)号：JPH10209148A

公开(公告)日：1998-08-07

申请号：JP1212497

申请日：1997-01-27

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/768 ,  H01L21/316 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To improve adhesion and processing properties by using a feed gas containing tetrafluoroethylene, silane compound, and H2 O2 and forming a low dielectric constant insulator film on a substrate to be treated by the liquid phase CVD method. SOLUTION: A lower-layer interlayer insulation film 12 consisting of, for example, SiO2 , a wiring layer 13 consisting of, for example, Al-1% Si, and a protection film 14 consisting of, for example, SiO2 for conformally covering the wiring layer 13 are formed on a semiconductor substrate 11. Then, by using a feed gas containing tetrafluoroethylene, silane compound, and H2 O2 , a low dielectric constant insulation film 15 is formed on the semiconductor substrate 11 by the liquid phase CVD method. After that, an insulation film 16 consisting of, for example, SiO2 is formed on the low dielectric constant insulation film 15 by the CVD method, thus improving a gap fill capacity and global flattening capacity, an adhesion property, and an etching characteristic and obtaining a semiconductor device such as a reliable logic IC and a high-integration memory.

公开(公告)号：JPH10199976A

公开(公告)日：1998-07-31

申请号：JP253897

申请日：1997-01-10

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/28 ,  H01L21/768

Abstract: PROBLEM TO BE SOLVED: To form a via plug having good embedding property, without deteriorating a low permittivity organic film. SOLUTION: In a method of manufacturing a multi-layered wiring having a process, wherein an insulating film 17 containing at least a low permittivity organic film 15 is formed on a substrate 10, a via hole 18 is formed on the insulating film 17, and a via plug 23 is formed in the via hole 18, the via plug 23 is formed at the temperature equal to or lower than 350 deg.C. That is, the formation of a tungsten film 22 turning into the via plug 23 is performed at a temperature lower than or equal to the above temperature. Preferably, annealing of the low permittivity organic film 15 is performed in the range equal to or higher than the forming temperature of the via plug 23 and equal to or lower than the thermal decomposition temperature of the low permittivity organic film 15, before a forming process of the via plug 23.

公开(公告)号：JPH10112503A

公开(公告)日：1998-04-28

申请号：JP28177596

申请日：1996-10-03

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/28 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device, which can easily form wiring buried in a connection hole and a wiring groove by means of a damachine process, without increasing the number of processes when an organic low dielectric constant film is used for a part of an interlayer insulating film. SOLUTION: A silicon oxide film 2, an organic low dielectric constant film 3 and a silicon oxide film 4 are sequentially formed on a silicon substrate 1. The silicon oxide film 4 is selectively etched and an opening 6, in the form of a wiring pattern, is formed. Then, the organic low dielectric constant film 3 and the silicon oxide film 2 in the opening 6 are sequentially and selectively etched, and a via hole 8 is formed. Then, the wiring groove 9 is formed by etching the organic low dielectric constant film 3 with the silicon oxide film 4 as a mask. Then, a wiring material is formed on the whole surface of the substrate, the wiring material is polished and the wiring material of an unwanted part is removed. Thus, the wiring buried in the via hole 8 and the wiring groove 9 is formed.

公开(公告)号：JPH09312334A

公开(公告)日：1997-12-02

申请号：JP12661996

申请日：1996-05-22

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/31 ,  H01L21/312 ,  H01L21/324 ,  H01L21/768 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To secure the breakdown resistance of insulation between conductive patterns. SOLUTION: In the first process, a silane coupling agent 14 is applied on the surface of a silicon oxide film 12 after formation of a conductive film 13 on a silicon oxide film 12 made on a substrate 11. In the second process, an organic film 15 is made in such condition that it covers the conductive pattern 13. In the third process, a space 17 is made between the conductive pattern 13 and the organic film 15 by cooling the above organic film 15 after annealing at a temperature higher than the glass transition temperature of the organic film 15 but lower than the thermal decomposition temperature.

公开(公告)号：JPH09283514A

公开(公告)日：1997-10-31

申请号：JP11328396

申请日：1996-04-09

Applicant: SONY CORP

Inventor： MATSUZAWA NOBUYUKI ,  HASEGAWA TOSHIAKI

IPC: C09D183/04 ,  H01L21/312 ,  H01L21/768 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To improve an adhesion between a silicon oxide film and an organic material film which form an electronic device material, the organic material film being formed on the silicon oxide film. SOLUTION: In the electronic device material which is made up of a silicon oxide film and an organic material film formed thereon, a silane coupling agent is included in the organic material film. The electronic device material can be fabricated by coating on the silicon oxide film a composition for formation of the organic material film containing the silane coupling agent and matrix resin, or by depositing both the silane coupling agent and matrix resin to form the organic material film.

公开(公告)号：JPH08335579A

公开(公告)日：1996-12-17

申请号：JP14045395

申请日：1995-06-07

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/768 ,  H01L21/205 ,  H01L21/316 ,  H01L23/522

Abstract: PURPOSE: To reduce dielectric constant while maintaining reliability by securing heat resistance of a silicon-based oxide film containing fluorine. CONSTITUTION: Nitrogen atoms are contained in a silicon-based oxide film containing fluorine, and the concentration of the nitrogen atoms contained in the film is 0.1-5 atomic %. In its manufacturing method, raw material gases comprising a silane-based gas, a gas containing fluorine, and an oxide dinitrogen gas are used for example. Or a raw material gas containing at least a silane- based gas and oxygen, a gas containing fluorine, and ammonia gas are used. Or a chemical vapor phase growth method using a raw material gases containing at least a silane-based gas, a gas containing oxygen, a gas containing fluorine, and a nitrogen gas are used.

公开(公告)号：JPH06163518A

公开(公告)日：1994-06-10

申请号：JP19486292

申请日：1992-06-29

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: C23C16/14 ,  C23C16/46 ,  C30B25/12 ,  H01L21/205 ,  H01L21/31

Abstract: PURPOSE:To provide a filming system, e.g. a CVD system, equipped with a supporting table (susceptor) having improved temperature distribution. CONSTITUTION:The filming system comprises a supporting table 2 for mounting a semiconductor substrate 3, a heater 1 for heating the semiconductor substrate 3 through the supporting table 2, and means for supplying a material gas required for growing a thin film on the semiconductor substrate 3. The supporting table 2 is split into a part 2a coming into contact with at least the semiconductor substrate 3 and a part 2b fixed to a side wall 7 of a reaction chamber on the outer periphery of the supporting table 2. Preferably, graphite having high thermal conductivity is employed at the contacting part 2a whereas silicon or SUS having low thermal conductivity is employed at the fixed part 2b.

公开(公告)号：JPH06163418A

公开(公告)日：1994-06-10

申请号：JP33949492

申请日：1992-11-27

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/205

Abstract: PURPOSE:To obtain a reduced pressure CVD device in which gaseous raw material does not generate vapor-phase reaction in a gaseous raw material piping by a method wherein a cooling means, which cools the gaseous raw material flowing in the gaseous raw material piping provided in a reaction chamber, is provided. CONSTITUTION:A cooling device 60 is provided surrounding the outside of a gaseous raw material piping 40 arranged in a reactor. To be more precise, the cooling device 60 and the gaseous raw material piping 40 has a double-tube structure. The cooling device 60 and the gaseous raw material piping 40 are made of quartz glass. A cooling medium provided outside the device is introduced into the cooling device 60. As the raw gas flowing in the gaseous raw material piping 40 provided in the reaction tube 10 is cooled down by the cooling device 60, the state inside the gaseous raw material piping 40 diverges from a vapor phase reaction forming region even in the same partial pressure. As a result, the gaseous raw material can be prevented from generation of vapor-phase reaction in the gaseous raw material piping.