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公开(公告)号：JP2001112012A
公开(公告)日：2001-04-20
申请号：JP28595799
申请日：1999-10-06
Applicant: SONY CORP
Inventor： FUKUDA HIROSHI , KAGAWA TAKASHI
Abstract: PROBLEM TO BE SOLVED: To improve restoring in a decoded signal by using a low compression rate for an image pickup signal. SOLUTION: A recording and reproducing facility of a camcorder is provided with a camera section 1 with a single CCD color image pickup means, an processing section 2 that converts an image pickup signal outputted from the camera section 1 into a digital signal, a compression section 11 that directly compresses the image pickup signal converted into the digital signal by the A/D converter section 2, a write and read section 3 that has a write function to write the compressed image pickup signal by the compression section 11 to a medium 100 and a read function to read the image pickup signal compressed by the compression section 11 and written on the medium 100, an expansion section 12 that expands the image pickup signal read by the write and read section 3, and a camera signal processing section 14 that outputs a 3-primary color signal, a luminance signal and color difference signals from the image pickup signal expanded by the expansion section 12.
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公开(公告)号：JPH11340766A
公开(公告)日：1999-12-10
申请号：JP14630198
申请日：1998-05-27
Applicant: SONY CORP
Inventor： KAGAWA TAKASHI
IPC: H03G11/00
Abstract: PROBLEM TO BE SOLVED: To provide a limiter circuit of excellent limiter balance characteristics suitable for being made into an IC and contributing to the miniaturization of an electronic equipment and the improvement of manufacture efficiency. SOLUTION: The emitters of two transistors T101 and T102 are connected to each other and the transistor T103 and a resistor R104 constituting a current source are provided between the emitters connected in common and the ground. In the current source, the size of the amplitude of signals outputted from an output terminal 2 is controlled by a potential inputted from an output control terminal 3. The signals from the collector of the transistor T101 are divided by a resistor R102 and a resistor R103 and the divided signals are impressed to the base of the transistor T101 and negatively fed back. Further, the signals from the collector of the transistor T102 are divided by a resistor R106 and a resistor 107R, DC components are extracted from the divided signals, applied to the base of the transistor T102 and negatively fed back and the amplitude is limited.
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公开(公告)号：JPH10145691A
公开(公告)日：1998-05-29
申请号：JP29484596
申请日：1996-11-07
Applicant: SONY CORP
Inventor： KAGAWA TAKASHI
Abstract: PROBLEM TO BE SOLVED: To provide a video signal processing unit in which the unit operating time is extended especially in the case of using a battery for a power supply by suppressing circuit current consumption for a signal period where no video image is displayed on a screen so as to reduce the power consumption of the entire unit. SOLUTION: Based on a detection output for a horizontal mute period by a horizontal mute period detection circuit 11 and a detection output for a vertical mute period by a vertical mute period detection circuit 10, an input of a video signal converted into a digital signal and a reference clock signal to a signal processing circuit 4 is controlled and the signal processing for the video signal for the horizontal and vertical mute periods in the signal processing circuit 4 is stopped. Moreover, signal control means 3, 6, 7, 8 interpolating the period with an interpolation signal are used to reduce the circuit current consumption of the signal processing circuit 4 to reduce the entire power consumption of the processing unit.
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公开(公告)号：JP2002064793A
公开(公告)日：2002-02-28
申请号：JP2000248718
申请日：2000-08-18
Applicant: SONY CORP
Inventor： KAGAWA TAKASHI
Abstract: PROBLEM TO BE SOLVED: To provide an image signal processor that generates a stator image, consisting of progressive image signals with high sharpness. SOLUTION: An image signal from a delay circuit 12 is extracted through an image interpolation filter 10, and a delay circuit 22 equivalent to a filter 13 and the image signal selected by a selector 23 is extracted at an output terminal 15 via a selector 14. That is, in this case, the bypass means (delay circuit 22 and the selector 23), provided to the image signal processor extract one and other images written in 1st and 2nd image memories 3, 4 while bypassing the image interpolation filter 10 and the image quality adjustment filter 13. Then the selection by the selectors 14, 23 is conducted, depending on the identification signal to identify an interlace image signal or a progressive image signal extracted by a decoder circuit 2, a static image/moving image mode signal fed to a control terminal 18 and one/other field selection signal fed to a control terminal 19.
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公开(公告)号：JP2001309311A
公开(公告)日：2001-11-02
申请号：JP2000124417
申请日：2000-04-25
Applicant: SONY CORP
Inventor： FUKUDA HIROSHI , KAGAWA TAKASHI
Abstract: PROBLEM TO BE SOLVED: To convert the video signal of a nonstandard signal into a standard signal with a simple configuration. SOLUTION: The nonstandard signal and a write synchronizing signal are supplied to a memory controlling part 21 and the nonstandard signal is written to a memory 22 according to its own synchronizing signal. A read synchronizing signal is also supplied to the part 21 and the video signal written to the memory 22 is read according to the synchronizing signal of the standard signal. The write synchronizing signal and the read synchronizing signal are further supplied to a delay quantity detection circuit 23 for a write/read(W/R) synchronizing signal, and a time base deviation between the synchronizing signals is detected. When the deviation reaches a time corresponding to one frame or one field, a detection signal from the circuit 23 is supplied to the part 21, and overtaking takes place in a frame or field unit between writing and reading of a video signal in a memory 22.
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Patent Agency Ranking
公开(公告)号：JP2000184267A
公开(公告)日：2000-06-30
申请号：JP35878098
申请日：1998-12-17
Applicant: SONY CORP
Inventor： KAGAWA TAKASHI
Abstract: PROBLEM TO BE SOLVED: To provide a video signal processor provided with a noise elimination circuit for image pickup device capable of reducing power consumption and prolonging the service life of a power source battery by a relatively simple method by providing a noise processing power control means for controlling the supply of power to a noise elimination means corresponding to the lightness of an object detected by a lightness detection means or the like. SOLUTION: To the signal input 24 of a light quantity judgement circuit 30, the light quantity information signals of video signals are inputted from a camera signal processing circuit. In a light quantity detection circuit 25, input average value calculation and a filtering processing for noise elimination are performed and light quantity discrimination signals are outputted. The light quantity discrimination signals and a comparison value 28 set beforehand are compared in a comparator 26 and whether a light quantity is large or small is judged. Such a light quantity judgement circuit 30 for detecting the lightness of the object photographed by the image pickup optical system of a camera or the like is provided and the supply of the power to a noise extraction circuit 23 is controlled corresponding to the lightness of the object detected by the light quantity judgement circuit 30.
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公开(公告)号：JPH11196290A
公开(公告)日：1999-07-21
申请号：JP36919497
申请日：1997-12-29
Applicant: SONY CORP
Inventor： KAGAWA TAKASHI , UEDA YASUO , TANAKA KENTA , YANAGI YUJI , HIYOSHI JUN
Abstract: PROBLEM TO BE SOLVED: To simplify the configuration of a signal processing system applied to an integration type video camera. SOLUTION: The processing unit is provided with a camera processing circuit 19 that receives a video signal from an image pickup means 3 and applies digital processing to the video signal, and recording and/or reproducing processing circuits 20, 22 that apply recording processing to a signal processed by the camera processing circuit 19 and/or applying reproduction processing to the signal reproduced from a recording medium. The camera processing circuit and the recording and/or reproducing processing circuit are integrated in a same integrated circuit 1.
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公开(公告)号：JPH08331595A
公开(公告)日：1996-12-13
申请号：JP15538095
申请日：1995-05-30
Applicant: SONY CORP
Inventor： KAGAWA TAKASHI
Abstract: PURPOSE: To conduct improvement of S/N and color reproduction without a sense of incongruity in color drooping and dropout. CONSTITUTION: A reproduced color signal received at an input terminal 1 is extracted by a subtractor 5= and an adder 7. An output signal from the subtractor 5 is fed to the adder 7 via a delay line 6 and to an output terminal 11. An output signal of the adder 7 is fed to one input terminal (a) of a switch circuit 21 and to other input terminal (b) and an output signal of an output terminal (c) of the switch circuit 21 is given to one input terminal (a) of a switch circuit 13 via a coefficient device 10. When a dropout takes place, other input terminal (b) and the output terminal (c) of the switch circuit 21 are connected by a dropout detection signal (Sd). The switch circuit 13 is selected by a line non-correlation detection signal (Sc) and the other input terminal (b) and the output terminal (c) are connected in the case of non-correlation. Then a color signal whose noise is eliminated from the subtractor 5 is given to the output terminal 11.
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公开(公告)号：JPH08331579A
公开(公告)日：1996-12-13
申请号：JP15537995
申请日：1995-05-30
Applicant: SONY CORP
Inventor： KAGAWA TAKASHI
Abstract: PURPOSE: To make a delay line in common for a luminance system and a chrominance system and to decrease the circuit scale. CONSTITUTION: A delay line 5 is used in common for a 1H delay line for dropout compensation, a delay line for line correlation YNR, and a line correlation CNR. A luminance signal subjected to band limit by a trap circuit 25 and a chroma signal from a subtractor 14 are fed to an adder 23 connected to the input side onf the delay line 5. A luminance signal whose noise is eliminated from the subtractor 11 is extracted at an output terminal 12 and a chroma signal whose noise is eliminated from a band pass filter 24 is extracted at an output terminal 22.
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公开(公告)号：JPH08275030A
公开(公告)日：1996-10-18
申请号：JP7381795
申请日：1995-03-30
Applicant: SONY CORP
Inventor： KAGAWA TAKASHI
IPC: H04N5/16
Abstract: PURPOSE: To attain clamping stably at a SYNC tip DC potential. CONSTITUTION: A capacitor 22 eliminates a DC component of an input color video, signal CVin, a DC bias Vin is added to the resulting video signal via a resistor 23 and the sum signal is fed to an input of a buffer 24, and an output color video signal CVout is obtained from an output of the buffer 24. An output signal of the buffer 24 is fed to a comparator 28 via a buffer 26 and a filter 27 forming a detection path of a SYNC tip DC potential, in which the output signal is compared with a reference DC potential Vref. The comparator 28 provides an output of a current I as the result of comparison to control charge/ discharge of a capacitor 22 to conduct negative feedback control so that the SYNC tip DC potential of the output color video signal CVout is equal to the reference DC potential Vref. A stable video image is obtained by conducting clamping at the SYNC tip DC potential stably independently of a waveform and an amplitude of a chroma signal in order to allow the filter 27 to attenuate or eliminate the chroma signal component.
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