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公开(公告)号:CA2233521A1
公开(公告)日:1998-09-30
申请号:CA2233521
申请日:1998-03-30
Applicant: SONY CORP
Inventor: TSUTSUI KYOYA , SHIMOYOSHI OSAMU
IPC: G06F17/14 , G10L19/00 , G11B20/00 , G11B20/10 , H04B1/66 , H04H20/88 , H03M7/00 , G11B23/00 , H04S1/00
Abstract: An encoding method and apparatus and a decoding method and apparatus in which the encoded information is decreased in volume and in which the encoding and decoding operations are performed with a smaller processing volume and a smaller buffer memory capacity. The apparatus includes a low range signal splitting circuit for separating low-range side signal components from L and R channel signals converted by a transform circuit into spectral signal components, and a channel synthesis circuit for synthesizing (L+R) channel signal components from the L and R channel spectral signal components. The apparatus also includes a high range signal separating circuit for separating the high range side signal components from the (L+R) channel signal components, a signal component encoding circuit for compression-encoding low-range side signal components and a signal component encoding circuit for compression-encoding the normalization coefficient information obtained on normalization of the (L+R) channel high-range signal components.
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公开(公告)号:HU213963B
公开(公告)日:1997-11-28
申请号:HU9203758
申请日:1992-03-27
Applicant: SONY CORP
Inventor: SHIMOYOSHI OSAMU , TSUTSUI KYOYA
Abstract: An apparatus for compressing a digital input signal compresses a digital input signal arranged into frames of plural samples. The digital input signal is orthogonally transformed by plural orthogonal transform circuits in blocks derived by dividing the frames by a different divisor in each circuit. The resulting spectral coefficients are quantized using an adaptive number of bits. The output of one orthogonal transform circuit is selected based on the outputs of the orthogonal transform circuits. The digital input signal is divided into plural frequency ranges, and frames are formed in each range. A block length decision circuit determines division of the frames of each range signal into blocks in response to range signal dynamics. The range signals are orthogonally transformed in blocks and the spectral coefficients are quantized. The apparatus also includes a frequency analyzing circuit that derives spectral data points from the input data, and groups them in plural bands. A noise level setting circuit finds the energy in each band and sets a allowable noise level in response to the band energy. A block floating coefficient calculating circuit calculates block floating coefficients based on the maximum spectral data point in each band. A quantizing bit number decision circuit determines the number of bits to use for quantizing in response to the allowable noise level and the block floating coefficients. A quantizing circuit quantizes the spectral data points in response to the quantizing bit number decision circuit.
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公开(公告)号:DE69219718T2
公开(公告)日:1997-10-02
申请号:DE69219718
申请日:1992-03-27
Applicant: SONY CORP
Inventor: TSUTSUI KYOYA , SHIMOYOSHI OSAMU
Abstract: An apparatus for compressing a digital input signal compresses a digital input signal arranged into frames of plural samples. The digital input signal is orthogonally transformed by plural orthogonal transform circuits in blocks derived by dividing the frames by a different divisor in each circuit. The resulting spectral coefficients are quantized using an adaptive number of bits. The output of one orthogonal transform circuit is selected based on the outputs of the orthogonal transform circuits. The digital input signal is divided into plural frequency ranges, and frames are formed in each range. A block length decision circuit determines division of the frames of each range signal into blocks in response to range signal dynamics. The range signals are orthogonally transformed in blocks and the spectral coefficients are quantized. The apparatus also includes a frequency analyzing circuit that derives spectral data points from the input data, and groups them in plural bands. A noise level setting circuit finds the energy in each band and sets a allowable noise level in response to the band energy. A block floating coefficient calculating circuit calculates block floating coefficients based on the maximum spectral data point in each band. A quantizing bit number decision circuit determines the number of bits to use for quantizing in response to the allowable noise level and the block floating coefficients. A quantizing circuit quantizes the spectral data points in response to the quantizing bit number decision circuit.
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公开(公告)号:DK0537361T3
公开(公告)日:1997-06-09
申请号:DK92907630
申请日:1992-03-27
Applicant: SONY CORP
Inventor: TSUTSUI KYOYA , SHIMOYOSHI OSAMU
Abstract: An apparatus for compressing a digital input signal compresses a digital input signal arranged into frames of plural samples. The digital input signal is orthogonally transformed by plural orthogonal transform circuits in blocks derived by dividing the frames by a different divisor in each circuit. The resulting spectral coefficients are quantized using an adaptive number of bits. The output of one orthogonal transform circuit is selected based on the outputs of the orthogonal transform circuits. The digital input signal is divided into plural frequency ranges, and frames are formed in each range. A block length decision circuit determines division of the frames of each range signal into blocks in response to range signal dynamics. The range signals are orthogonally transformed in blocks and the spectral coefficients are quantized. The apparatus also includes a frequency analyzing circuit that derives spectral data points from the input data, and groups them in plural bands. A noise level setting circuit finds the energy in each band and sets a allowable noise level in response to the band energy. A block floating coefficient calculating circuit calculates block floating coefficients based on the maximum spectral data point in each band. A quantizing bit number decision circuit determines the number of bits to use for quantizing in response to the allowable noise level and the block floating coefficients. A quantizing circuit quantizes the spectral data points in response to the quantizing bit number decision circuit.
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公开(公告)号:PT100309A
公开(公告)日:1994-04-29
申请号:PT10030992
申请日:1992-03-27
Applicant: SONY CORP
Inventor: TSUTSUI KYOYGA , SHIMOYOSHI OSAMU
Abstract: An apparatus for compressing a digital input signal compresses a digital input signal arranged into frames of plural samples. The digital input signal is orthogonally transformed by plural orthogonal transform circuits in blocks derived by dividing the frames by a different divisor in each circuit. The resulting spectral coefficients are quantized using an adaptive number of bits. The output of one orthogonal transform circuit is selected based on the outputs of the orthogonal transform circuits. The digital input signal is divided into plural frequency ranges, and frames are formed in each range. A block length decision circuit determines division of the frames of each range signal into blocks in response to range signal dynamics. The range signals are orthogonally transformed in blocks and the spectral coefficients are quantized. The apparatus also includes a frequency analyzing circuit that derives spectral data points from the input data, and groups them in plural bands. A noise level setting circuit finds the energy in each band and sets a allowable noise level in response to the band energy. A block floating coefficient calculating circuit calculates block floating coefficients based on the maximum spectral data point in each band. A quantizing bit number decision circuit determines the number of bits to use for quantizing in response to the allowable noise level and the block floating coefficients. A quantizing circuit quantizes the spectral data points in response to the quantizing bit number decision circuit.
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公开(公告)号:HU9203758D0
公开(公告)日:1993-04-28
申请号:HU9203758
申请日:1992-03-27
Applicant: SONY CORP
Inventor: TSUTSUI KYOYA , SHIMOYOSHI OSAMU
Abstract: An apparatus for compressing a digital input signal compresses a digital input signal arranged into frames of plural samples. The digital input signal is orthogonally transformed by plural orthogonal transform circuits in blocks derived by dividing the frames by a different divisor in each circuit. The resulting spectral coefficients are quantized using an adaptive number of bits. The output of one orthogonal transform circuit is selected based on the outputs of the orthogonal transform circuits. The digital input signal is divided into plural frequency ranges, and frames are formed in each range. A block length decision circuit determines division of the frames of each range signal into blocks in response to range signal dynamics. The range signals are orthogonally transformed in blocks and the spectral coefficients are quantized. The apparatus also includes a frequency analyzing circuit that derives spectral data points from the input data, and groups them in plural bands. A noise level setting circuit finds the energy in each band and sets a allowable noise level in response to the band energy. A block floating coefficient calculating circuit calculates block floating coefficients based on the maximum spectral data point in each band. A quantizing bit number decision circuit determines the number of bits to use for quantizing in response to the allowable noise level and the block floating coefficients. A quantizing circuit quantizes the spectral data points in response to the quantizing bit number decision circuit.
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公开(公告)号:NO924551L
公开(公告)日:1993-01-25
申请号:NO924551
申请日:1992-11-25
Applicant: SONY CORP
Inventor: TSUTSUO KYOYA , SHIMOYOSHI OSAMU
Abstract: An apparatus for compressing a digital input signal compresses a digital input signal arranged into frames of plural samples. The digital input signal is orthogonally transformed by plural orthogonal transform circuits in blocks derived by dividing the frames by a different divisor in each circuit. The resulting spectral coefficients are quantized using an adaptive number of bits. The output of one orthogonal transform circuit is selected based on the outputs of the orthogonal transform circuits. The digital input signal is divided into plural frequency ranges, and frames are formed in each range. A block length decision circuit determines division of the frames of each range signal into blocks in response to range signal dynamics. The range signals are orthogonally transformed in blocks and the spectral coefficients are quantized. The apparatus also includes a frequency analyzing circuit that derives spectral data points from the input data, and groups them in plural bands. A noise level setting circuit finds the energy in each band and sets a allowable noise level in response to the band energy. A block floating coefficient calculating circuit calculates block floating coefficients based on the maximum spectral data point in each band. A quantizing bit number decision circuit determines the number of bits to use for quantizing in response to the allowable noise level and the block floating coefficients. A quantizing circuit quantizes the spectral data points in response to the quantizing bit number decision circuit.
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公开(公告)号:DE69837738D1
公开(公告)日:2007-06-21
申请号:DE69837738
申请日:1998-03-25
Applicant: SONY CORP
Inventor: TSUTSUI KYOYA , SHIMOYOSHI OSAMU
Abstract: An encoding method and apparatus and a decoding method and apparatus in which the encoded information is decreased in volume and in which the encoding and decoding operations are performed with a smaller processing volume and a smaller buffer memory capacity. The apparatus includes a low range signal splitting circuit (261g, 261h) for separating low-range side signal components (260c,260d) from L and R channel signals (260a,260b) converted by a transform circuit into spectral signal components, and a channel synthesis circuit (261e) for synthesizing (L+R) channel signal components from the L and R channel spectral signal components (260c,260d). The apparatus also includes a high range signal separating circuit (261f) for separating the high range side signal components (260h) from the (L+R) channel signal components (260a,260b), a signal component encoding circuit (261j,261k) for compression-encoding low-range side signal components and a signal component encoding circuit (261i) for compression-encoding the normalization coefficient information obtained on normalization of the (L+R) channel high-range signal components.
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公开(公告)号:DE69635973D1
公开(公告)日:2006-05-18
申请号:DE69635973
申请日:1996-11-08
Applicant: SONY CORP
Inventor: SHIMOYOSHI OSAMU , TSUTSUI KYOYA
Abstract: Coding (2) of a high efficiency is achieved without increasing the scale of a code train transform table (1). Quantization spectra are divided into groups, and when two quantization spectra in any group are both equal to 0, they are coded (2) into 0. If the two quantization spectra are not equal to 0, the values (-2, 3) of the individual quantization spectra are coded (2) into corresponding values (1101, 1110) and 1 is added to the top of the code train (3).
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公开(公告)号:DE69533577T2
公开(公告)日:2005-10-06
申请号:DE69533577
申请日:1995-12-19
Applicant: SONY CORP
Inventor: TSUTSUI KYOYA , OIKAWA YOSHIAKI , SHIMOYOSHI OSAMU
Abstract: A method and apparatus for high efficiency encoding audio signals. The high-efficiency encoding apparatus includes a transform circuit (11; 61) for transforming an input signal into frequency components and a signal component separating circuit (62) for separating the frequency components into tonal components and noisy components. The high-efficiency encoding apparatus also includes a tonal component encoding circuit (63) for encoding tonal components and a noisy component encoding circuit (64) for encoding noisy components. The tonal components are made up only of signal components of a specified band and encoded along with the information specifying the band. The noisy components are normalized (31) and quantized (33) every pre-set encoding unit and encoded along with the quantization precision information. The information on the numbers of quantization steps of the noisy components is encoded with a smaller number of bits for the high- range side than for the low-range side. With the high-efficiency encoding method and apparatus, not only the main information but also the subsidiary information may be improved in encoding efficiency, while the degree of freedom may be assured in the method of representing the subsidiary information and satisfactory encoding may be achieved.
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