公开(公告)号：DE69508207T2

公开(公告)日：1999-10-14

申请号：DE69508207

申请日：1995-12-14

Applicant: ST MICROELECTRONICS SA

Inventor： LISART MATHIEU ,  SOURGEN LAURENT

IPC: G06F12/14 ,  G06F21/02 ,  G06K17/00

Abstract: The system includes a microprocessor(1), a memory bank(2- 9) containing words(17), a transmission bus(15) for sending data, address and control information between the microprocessor and the memory bank, and an access protection circuit(18). The access protection circuit contains a decision table(18), circuits(19) for addressing the table(18), with the addresses of the memory words. A protection circuit(31-33) which produces a protection signal as a function of a read of the decision table. It allots(14) to certain words to be protected(17) an arrangement of control bits(21) , a circuit(22) to read these control bits at the time (LEC) of reading these words, and a circuit(23-25) to address the decision table as a function of the value of the bits read.

公开(公告)号：DE69700123T2

公开(公告)日：1999-06-24

申请号：DE69700123

申请日：1997-05-05

Applicant: ST MICROELECTRONICS SA

Inventor： LISART MATHIEU ,  SOURGEN LAURENT

IPC: G11C16/12 ,  H03K4/00 ,  G11C16/06

Abstract: The circuit comprises a voltage booster which produces a high DC output. A control circuit uses this to generate a ramped programming voltage. The source of a first P-type load transistor is connected to the output of the voltage booster. Its drain is coupled to a capacitor and by its gate to the control circuit. The high voltage programming output is produced at the transistor drain. The control circuit includes a pulse generator which applies a stepped voltage to the load transistor gate. The capacitor is formed by line of bits in a memory map. The control circuit also comprises a P-type transistor which is mounted in diode configuration and is used to charge the capacitor with a constant current.