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公开(公告)号：US20150108537A1
公开(公告)日：2015-04-23
申请号：US14510663
申请日：2014-10-09
Inventor： Samuel Menard , Gael Gautier
IPC: H01L29/747 , H01L29/66
CPC classification number: H01L29/66386 , H01L21/2885 , H01L21/76202 , H01L29/0615 , H01L29/0619 , H01L29/0642 , H01L29/0649 , H01L29/0661 , H01L29/32 , H01L29/456 , H01L29/747 , H01L29/87
Abstract: A vertical power component includes a silicon substrate of a first conductivity type with a well of the second conductivity type on a lower surface of the substrate. The first well is bordered at a component periphery with an insulating porous silicon ring. An upper surface of the porous silicon ring is only in contact with the substrate of the first conductivity type. The insulating porous silicon ring penetrates into the substrate down to a depth greater than a thickness of the well.
Abstract translation: 垂直功率部件包括在衬底的下表面上具有第二导电类型的阱的第一导电类型的硅衬底。 第一个阱在具有绝缘多孔硅环的部件周边上界定。 多孔硅环的上表面仅与第一导电类型的基板接触。 绝缘多孔硅环穿透衬底直至深度大于孔的厚度。
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公开(公告)号：US20180350793A1
公开(公告)日：2018-12-06
申请号：US16055635
申请日：2018-08-06
Applicant: STMicroelectronics (Tours) SAS
Inventor： Samuel Menard
IPC: H01L27/02 , H01L29/87 , H01L29/747 , H01L29/74 , H01L29/423 , H01L29/417
CPC classification number: H01L27/0248 , H01L29/41716 , H01L29/42308 , H01L29/7404 , H01L29/7416 , H01L29/747 , H01L29/87
Abstract: A triac has a vertical structure formed from a silicon substrate having an upper surface side. A main metallization on the upper surface side has a first portion resting on a first region of a first conductivity type formed in a layer of a second conductivity type. A second portion of the main metallization rests on a portion of the layer. A gate metallization on the upper surface side rests on a second region of the first conductivity type formed in the layer in the vicinity of the first region. A porous silicon bar formed in the layer at the upper surface side has a first end in contact with the gate metallization and a second end in contact with the main metallization.
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公开(公告)号：US10068999B2
公开(公告)日：2018-09-04
申请号：US15142070
申请日：2016-04-29
Inventor： Samuel Menard , Gael Gautier
IPC: H01L29/74 , H01L29/66 , H01L29/747 , H01L29/06 , H01L29/167
Abstract: A high-voltage vertical power component including a silicon substrate of a first conductivity type, and a first semiconductor layer of the second conductivity type extending into the silicon substrate from an upper surface of the silicon substrate, wherein the component periphery includes: a porous silicon ring extending into the silicon substrate from the upper surface to a depth deeper than the first layer; and a doped ring of the second conductivity type, extending from a lower surface of the silicon surface to the porous silicon ring.
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公开(公告)号：US20170287892A1
公开(公告)日：2017-10-05
申请号：US15243552
申请日：2016-08-22
Applicant: STMicroelectronics (Tours) SAS
Inventor： Samuel Menard
IPC: H01L27/02 , H01L29/747 , H01L29/87 , H01L29/74
CPC classification number: H01L29/747 , H01L27/0248 , H01L29/41716 , H01L29/42308 , H01L29/7404 , H01L29/7416 , H01L29/87
Abstract: A triac has a vertical structure formed from a silicon substrate having an upper surface side. A main metallization on the upper surface side has a first portion resting on a first region of a first conductivity type formed in a layer of a second conductivity type. A second portion of the main metallization rests on a portion of the layer. A gate metallization on the upper surface side rests on a second region of the first conductivity type formed in the layer in the vicinity of the first region. A porous silicon bar formed in the layer at the upper surface side has a first end in contact with the gate metallization and a second end in contact with the main metallization.
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公开(公告)号：US09722061B2
公开(公告)日：2017-08-01
申请号：US14731563
申请日：2015-06-05
Applicant: STMicroelectronics (Tours) SAS
Inventor： Samuel Menard , Dalaf Ali
IPC: H01L29/66 , H01L29/747 , H01L29/06
CPC classification number: H01L29/747 , H01L29/0638
Abstract: A bidirectional switch is formed in a semiconductor substrate of a first conductivity type. The switch includes first and second thyristors connected in antiparallel extending vertically between front and rear surfaces of the substrate. A vertical peripheral wall of the second conductivity type connects the front surface to the rear surface and surrounds the thyristors. On the front surface, in a ring-shaped region of the substrate separating the vertical peripheral wall from the thyristors, a first region of the first conductivity type is provided having a doping level greater than the substrate and having the shape of a ring-shaped band portion partially surrounding the first thyristor and stopping at the level of the adjacent region between the first and second thyristors.
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Patent Agency Ranking
公开(公告)号：US09680468B2
公开(公告)日：2017-06-13
申请号：US14957984
申请日：2015-12-03
Applicant: STMicroelectronics (Tours) SAS
Inventor： Yannick Hague , Samuel Menard
IPC: H03K17/72 , H03K17/735 , H01L29/74 , H01L29/747 , H03K17/725 , H03K17/06 , H03K17/16 , H03K17/74
CPC classification number: H03K17/735 , H01L29/7408 , H01L29/7412 , H01L29/747 , H03K17/06 , H03K17/16 , H03K17/725 , H03K17/74 , H03K2017/066
Abstract: A bidirectional power switch includes first and second thyristors connected in antiparallel between first and second conduction terminals of the switch. The first thyristor is of an anode-gate thyristor, and the second thyristor is of a cathode-gate thyristor. The gates of the first and second thyristors are coupled to a same control terminal of the switch by respective dipole circuits. At least one of the dipole circuits is formed by at least one diode or at least one resistor.
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公开(公告)号：US09437722B2
公开(公告)日：2016-09-06
申请号：US14510663
申请日：2014-10-09
Inventor： Samuel Menard , Gael Gautier
IPC: H01L29/747 , H01L29/87 , H01L29/06 , H01L29/66
CPC classification number: H01L29/66386 , H01L21/2885 , H01L21/76202 , H01L29/0615 , H01L29/0619 , H01L29/0642 , H01L29/0649 , H01L29/0661 , H01L29/32 , H01L29/456 , H01L29/747 , H01L29/87
Abstract: A vertical power component includes a silicon substrate of a first conductivity type with a well of the second conductivity type on a lower surface of the substrate. The first well is bordered at a component periphery with an insulating porous silicon ring. An upper surface of the porous silicon ring is only in contact with the substrate of the first conductivity type. The insulating porous silicon ring penetrates into the substrate down to a depth greater than a thickness of the well.
Abstract translation: 垂直功率部件包括在衬底的下表面上具有第二导电类型的阱的第一导电类型的硅衬底。 第一个阱在具有绝缘多孔硅环的部件周边上界定。 多孔硅环的上表面仅与第一导电类型的基板接触。 绝缘多孔硅环穿透衬底直至深度大于孔的厚度。
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公开(公告)号：US09343557B2
公开(公告)日：2016-05-17
申请号：US13762288
申请日：2013-02-07
Inventor： Samuel Menard , Gaël Gautier
IPC: H01L29/66 , H01L29/74 , H01L29/747 , H01L29/06
CPC classification number: H01L29/7424 , H01L29/0619 , H01L29/167 , H01L29/66386 , H01L29/747
Abstract: A high-voltage vertical power component including a silicon substrate of a first conductivity type, and a first semiconductor layer of the second conductivity type extending into the silicon substrate from an upper surface of the silicon substrate, wherein the component periphery includes: a porous silicon ring extending into the silicon substrate from the upper surface to a depth deeper than the first layer; and a doped ring of the second conductivity type, extending from a lower surface of the silicon surface to the porous silicon ring.
Abstract translation: 一种高电压垂直功率元件，包括第一导电类型的硅衬底和从硅衬底的上表面延伸到硅衬底中的第二导电类型的第一半导体层，其中所述元件周边包括：多孔硅 环从上表面延伸到深度比第一层深的硅衬底; 以及从硅表面的下表面延伸到多孔硅环的第二导电类型的掺杂环。
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公开(公告)号：US20160118485A1
公开(公告)日：2016-04-28
申请号：US14990194
申请日：2016-01-07
Inventor： Samuel Menard , Gael Gautier
IPC: H01L29/747 , H01L29/66
CPC classification number: H01L29/66386 , H01L21/2885 , H01L21/76202 , H01L29/0615 , H01L29/0619 , H01L29/0642 , H01L29/0649 , H01L29/0661 , H01L29/32 , H01L29/456 , H01L29/747 , H01L29/87
Abstract: A vertical power component includes a silicon substrate of a first conductivity type with a well of the second conductivity type on a lower surface of the substrate. The first well is bordered at a component periphery with an insulating porous silicon ring. An upper surface of the porous silicon ring is only in contact with the substrate of the first conductivity type. The insulating porous silicon ring penetrates into the substrate down to a depth greater than a thickness of the well.
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公开(公告)号：US08901601B2
公开(公告)日：2014-12-02
申请号：US13774554
申请日：2013-02-22
Inventor： Samuel Menard , Yannick Hague , Gaël Gautier
IPC: H01L29/74 , H01L31/111 , H01L29/06 , H01L29/747 , H01L29/66
CPC classification number: H01L29/747 , H01L24/32 , H01L29/0638 , H01L29/0649 , H01L29/0661 , H01L29/66386 , H01L2224/32014
Abstract: A vertical power component including a silicon substrate of a first conductivity type and, on the side of a lower surface supporting a single electrode, a well of the second conductivity type, in which the component periphery includes, on the lower surface side, a peripheral trench at least partially filled with a passivation and, between the well and the trench, a porous silicon insulating ring.
Abstract translation: 一种垂直功率分量，包括第一导电类型的硅衬底，并且在支撑单个电极的下表面侧，在所述下表面侧具有第二导电类型的阱，所述第二导电类型的阱在所述下表面侧具有周边 至少部分地填充有钝化物的沟槽，以及阱和沟槽之间的多孔硅绝缘环。
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