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    Microelectronic device having protected connections and manufacturing process thereof
    12.
    发明授权
    Microelectronic device having protected connections and manufacturing process thereof 有权

    公开(公告)号：US10985131B2

    公开(公告)日：2021-04-20

    申请号：US16830613

    申请日：2020-03-26

    Applicant: STMicroelectronics S.r.l.

    Inventor： Daniele Caltabiano ,  Agatino Minotti

    IPC: H01L23/00 ,  H01L23/04 ,  H01L23/10 ,  H01L23/498 ,  H05K1/11 ,  H05K1/14 ,  H01L23/538

    Abstract: A microelectronic device includes a chip housing a functional part and carrying first electrical contact regions in electrical connection with the functional part through first protected connections extending over or in the chip. A substrate has a first contact area and a second contact area, which is remote from the first contact area. The first contact area carries second electrical contact regions, and the second contact area carries external connection regions. The second contact regions and the external connection regions are in mutual electrical connection through second protected connections extending over or in the substrate. A protection-ring structure surrounds the first and second electrical contact regions and delimits a first chamber closed with respect to the outside. The first electrical contact regions and the second electrical contact regions are in mutual electrical contact.

    MICROELECTRONIC DEVICE HAVING PROTECTED CONNECTIONS AND MANUFACTURING PROCESS THEREOF
    13.
    发明申请
    MICROELECTRONIC DEVICE HAVING PROTECTED CONNECTIONS AND MANUFACTURING PROCESS THEREOF 审中-公开

    公开(公告)号：US20200227375A1

    公开(公告)日：2020-07-16

    申请号：US16830613

    申请日：2020-03-26

    Applicant: STMicroelectronics S.r.l.

    Inventor： Daniele Caltabiano ,  Agatino Minotti

    IPC: H01L23/00 ,  H01L23/04 ,  H01L23/10 ,  H01L23/498

    Abstract: A microelectronic device includes a chip housing a functional part and carrying first electrical contact regions in electrical connection with the functional part through first protected connections extending over or in the chip. A substrate has a first contact area and a second contact area, which is remote from the first contact area. The first contact area carries second electrical contact regions, and the second contact area carries external connection regions. The second contact regions and the external connection regions are in mutual electrical connection through second protected connections extending over or in the substrate. A protection-ring structure surrounds the first and second electrical contact regions and delimits a first chamber closed with respect to the outside. The first electrical contact regions and the second electrical contact regions are in mutual electrical contact.

    FLIP-CHIP ELECTRONIC DEVICE AND PRODUCTION METHOD THEREOF
    15.
    发明申请
    FLIP-CHIP ELECTRONIC DEVICE AND PRODUCTION METHOD THEREOF 有权
    片式电子设备及其制造方法

    公开(公告)号：US20140001647A1

    公开(公告)日：2014-01-02

    申请号：US13921894

    申请日：2013-06-19

    Applicant: STMicroelectronics S.r.l.

    Inventor： Agatino Minotti ,  Maurizio Maria Ferrara

    IPC: H01L21/56 ,  H01L23/498 ,  H01L21/78

    CPC classification number: H01L21/56 ,  H01L21/02107 ,  H01L21/02109 ,  H01L21/02225 ,  H01L21/02318 ,  H01L21/78 ,  H01L23/142 ,  H01L23/49827 ,  H01L23/5389 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A method for making a set of electronic devices is proposed. The method comprises the steps of providing a support comprising a base plate of electrically conductive material, fixing a set of chips of semiconductor material onto respective portions of the base plate, each chip having a first main surface with at least one first conduction terminal and a second main surface opposite the first main surface with at least one second conduction terminal electrically connected to the base plate, fixing an insulating tape of electrically insulating material comprising a plurality of through-holes to the main surface of each chip, the insulating tape protruding from the chips over a further portion of the base plate being not covered by the chips, and forming at least one first electrical contact to each first terminal of the chips through a first set of the through-holes exposing at least in part said first terminal, and at least one second electrical contact to the base plate through a second set of the through-holes exposing at least in part the further portion of the base plate.

    Abstract translation: 提出了一种制造一组电子设备的方法。 该方法包括以下步骤：提供包括导电材料的基板的支撑件，将一组半导体材料的芯片固定到基板的相应部分上，每个芯片具有带有至少一个第一导电端子的第一主表面和 与第一主表面相对的第二主表面，具有与基板电连接的至少一个第二导电端子，将包括多个通孔的电绝缘材料的绝缘带固定到每个芯片的主表面，绝缘带从 基板的另一部分上的芯片不被芯片覆盖，并且通过至少部分地暴露于所述第一端子的第一组通孔形成至少一个第一电触点到芯片的每个第一端子， 以及通过第二组通孔至少部分地暴露于所述基板的至少一个第二电接触 她的底板部分。

    Power semiconductor device with a double island surface mount package
    16.
    发明授权
    Power semiconductor device with a double island surface mount package 有权

    公开(公告)号：US12278174B2

    公开(公告)日：2025-04-15

    申请号：US18306119

    申请日：2023-04-24

    Applicant: STMICROELECTRONICS S.r.l.

    Inventor： Cristiano Gianluca Stella ,  Agatino Minotti

    IPC: H01L23/498 ,  H01L23/373

    Abstract: A power semiconductor device including a first and second die, each including a plurality of conductive contact regions and a passivation region including a number of projecting dielectric regions and a number of windows. Adjacent windows are separated by a corresponding projecting dielectric region with each conductive contact region arranged within a corresponding window. A package of the surface mount type houses the first and second dice. The package includes a first bottom insulation multilayer and a second bottom insulation multilayer carrying, respectively, the first and second dice. A covering metal layer is arranged on top of the first and second dice and includes projecting metal regions extending into the windows to couple electrically with corresponding conductive contact regions. The covering metal layer moreover forms a number of cavities, which are interposed between the projecting metal regions so as to overlie corresponding projecting dielectric regions.

    Packaged semiconductor device having improved reliability and inspectionability and manufacturing method thereof
    17.
    发明授权
    Packaged semiconductor device having improved reliability and inspectionability and manufacturing method thereof 有权

    公开(公告)号：US12183707B2

    公开(公告)日：2024-12-31

    申请号：US17472207

    申请日：2021-09-10

    Applicant: STMICROELECTRONICS S.r.l.

    Inventor： Agatino Minotti

    IPC: H01L23/00 ,  H01L23/538

    Abstract: Packaged device having a carrying base; an accommodation cavity in the carrying base; a semiconductor die in the accommodation cavity, the semiconductor die having die pads; a protective layer, covering the semiconductor die and the carrying base; first vias in the protective layer, at the die pads; and connection terminals of conductive material. The connection terminals have first connection portions in the first vias, in electrical contact with the die pads, and second connection portions, extending on the protective layer, along a side surface of the packaged device.

    Power semiconductor device with a double island surface mount package
    18.
    发明授权
    Power semiconductor device with a double island surface mount package 有权

    公开(公告)号：US11658108B2

    公开(公告)日：2023-05-23

    申请号：US17142738

    申请日：2021-01-06

    Applicant: STMicroelectronics S.r.l.

    Inventor： Cristiano Gianluca Stella ,  Agatino Minotti

    IPC: H01L23/498 ,  H01L23/373

    CPC classification number: H01L23/49844 ,  H01L23/3735 ,  H01L23/49822

    Abstract: A power semiconductor device including a first and second die, each including a plurality of conductive contact regions and a passivation region including a number of projecting dielectric regions and a number of windows. Adjacent windows are separated by a corresponding projecting dielectric region with each conductive contact region arranged within a corresponding window. A package of the surface mount type houses the first and second dice. The package includes a first bottom insulation multilayer and a second bottom insulation multilayer carrying, respectively, the first and second dice. A covering metal layer is arranged on top of the first and second dice and includes projecting metal regions extending into the windows to couple electrically with corresponding conductive contact regions. The covering metal layer moreover forms a number of cavities, which are interposed between the projecting metal regions so as to overlie corresponding projecting dielectric regions.

    MICROELECTRONIC DEVICE HAVING PROTECTED CONNECTIONS AND MANUFACTURING PROCESS THEREOF
    19.
    发明申请
    MICROELECTRONIC DEVICE HAVING PROTECTED CONNECTIONS AND MANUFACTURING PROCESS THEREOF 审中-公开

    公开(公告)号：US20190088614A1

    公开(公告)日：2019-03-21

    申请号：US16124922

    申请日：2018-09-07

    Applicant: STMicroelectronics S.r.l.

    Inventor： Daniele Caltabiano ,  Agatino Minotti

    IPC: H01L23/00 ,  H01L23/10 ,  H01L23/04

    Abstract: A microelectronic device includes a chip housing a functional part and carrying first electrical contact regions in electrical connection with the functional part through first protected connections extending over or in the chip. A substrate has a first contact area and a second contact area, which is remote from the first contact area. The first contact area carries second electrical contact regions, and the second contact area carries external connection regions. The second contact regions and the external connection regions are in mutual electrical connection through second protected connections extending over or in the substrate. A protection-ring structure surrounds the first and second electrical contact regions and delimits a first chamber closed with respect to the outside. The first electrical contact regions and the second electrical contact regions are in mutual electrical contact.

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