Electronic ignition device with limitation of the voltage at an ignition coil primary winding terminal
    11.
    发明公开
    Electronic ignition device with limitation of the voltage at an ignition coil primary winding terminal 有权
    在点火线圈初级的端子与电压限制电子点火单元绕组

    公开(公告)号:EP1120565A1

    公开(公告)日:2001-08-01

    申请号:EP00830051.9

    申请日:2000-01-27

    Inventor: Torres, Antonino

    CPC classification number: F02P17/12

    Abstract: The electronic ignition device (50) comprises: an ignition coil (2) having a primary winding terminal (5) and a secondary winding terminal (6) generating a spark; a power element (3) arranged between the primary winding terminal (5) and ground (GND); a protection circuit (11) issuing a disable signal to the control terminal (8) of the power element (3) in preset conditions; and a voltage limiting circuit (51) having inputs (54, 55) connected to the primary winding terminal (5) and to the battery voltage (V B ), and an output (56) connected to the control terminal (8) of the power element (3). The voltage limiting circuit (51) detects a potential difference between its own inputs (54, 55) and supplies to the control terminal (8) an activation signal for the power element (3), in presence of the deactivation signal and when the potential difference exceeds the supply voltage (V B ) by a preset value. Thereby, the voltage limiting circuit (51) limits the voltage on the primary winding terminal (5) to a preset value (V L ) which depends upon the value of the battery voltage (V B ).

    Abstract translation: 电子点火装置(50)包括:点火线圈(2),其具有的初级绕组终端(5)和次级绕组终端(6)产生火花; 初级绕组终端(5)和接地(GND)之间设置的功率元件(3); 一个保护电路(11)发出一个禁用信号以在预先设置的条件的功率元件(3)的控制端子(8); 和电压限制连接到初级绕组终端电路(51)具有输入端(54,55)(5)连接到所述控制端子和电池电压(VB),并输出(56)(8)的功率的 元件(3)。 该电压限制电路(51)中检测到自身的输入(54,55)和电源之间的电势差到控制端子(8)所述的功率元件(3)的激活信号,在失活信号的存在,并且当电势 差超过所述电源电压(VB)由预先设定的值。 由此,电压限制电路(51)限制在初级绕组端子(5),以预先设定的值(VL)其中取决于电池电压(VB)的值上的电压。

    Biasing circuit for isolation region in integrated power circuit
    12.
    发明公开
    Biasing circuit for isolation region in integrated power circuit 审中-公开
    VistpannungsschaltungfürIsolationsbereich in integriertem Leistungsschaltkreis

    公开(公告)号:EP1028468A1

    公开(公告)日:2000-08-16

    申请号:EP99830066.9

    申请日:1999-02-09

    CPC classification number: H01L27/0826 H01L21/761

    Abstract: An integrated circuit including a vertical power component having a terminal formed by a chip substrate (1) of a first conductivity type, a control circuitry thereof, the control circuitry isolated from the substrate (1) by means of an isolation region (3) of a second conductivity type, and a protection structure against polarity inversion of a substrate potential (SUB). The protection structure comprises a first bipolar transistor (Q33) with an emitter connected to said isolation region and a collector connected to a reference potential input (12) of the integrated circuit, a bias circuit (Q11,R11,R22,R33,R44) for biasing the first bipolar transistor (Q33) in a reverse saturated mode when the substrate potential is higher than the reference potential, and a second bipolar transistor (Q22) with an emitter connected to the substrate and a base coupled to the isolation region for coupling the isolation region to the substrate through a high-impedance when the substrate potential is lower than the reference potential.

    Abstract translation: 一种集成电路,包括具有由第一导电类型的芯片基板(1)形成的端子的垂直功率部件及其控制电路,所述控制电路借助于隔离区域(3)与所述基板(1)隔离,所述隔离区域 第二导电类型,以及防止衬底电位(SUB)的极性反转的保护结构。 保护结构包括:第一双极型晶体管(Q33),其发射极连接到所述隔离区域;以及集电极,连接到集成电路的参考电位输入端(12),偏置电路(Q11,R11,R22,R33,R44) 用于当衬底电位高于参考电位时以反向饱和模式偏压第一双极晶体管(Q33),并且将第二双极晶体管(Q22)与发射极连接到衬底和耦合到隔离区的基极耦合 当衬底电位低于参考电位时,通过高阻抗到衬底的隔离区域。

    Completely integrated switch-on control-loop of a high voltage power transistor of a quasi resonant flyback converter
    13.
    发明公开
    Completely integrated switch-on control-loop of a high voltage power transistor of a quasi resonant flyback converter 有权
    Vollständigintegrierte Einschaltregelschleife eines Hochspannungsleistungstransistors eines quasiresonanten Sperrwandlers

    公开(公告)号:EP0989662A1

    公开(公告)日:2000-03-29

    申请号:EP98830554.6

    申请日:1998-09-23

    CPC classification number: H02M3/33523 Y02B70/1433

    Abstract: A flyback DC-DC converter, autooscillating in a quasi resonant manner (QRC) during steady state operation, employing a flyback transformer for storing and transferring energy to a load having an auxiliary winding (AUS) whose voltage is compared by a comparator (COMP1) with a threshold (VREF1) to detect its crossing and as a consequence switch on through a control flip-flop (FF) a power transistor (POWER) driving the primary winding of said transformer for a new phase of conduction and accumulation of energy, whose duration is established by a secondary control loop of the output voltage (ERROR AMP, CONTROL) producing the switching off of the power transistor for a successive energy transfer phase toward the load of the energy stored in the transformer during the preceding conduction phase, has a wholly integrated control circuit that comprises a second comparator (HVCOMP) of the voltage existing on the current terminal of said power transistor (POWER) connected to the primary winding of the transformer in respect to the ground potential of the circuit; a logic gate (OR) having a first input connected to the output of said second comparator (HVCOMP) and an output coupled to the set terminal of said control flip-flop (FF); a delay network (ON DELAY) coupled in cascade to the output of said first comparator (COMP1) and having an output coupled to a second input of said logic gate (OR), so that under steady state functioning conditions of the converter, the setting of the flip-flop (FF) is done by said second comparator (HVCOMP) rather than by said first comparator (COMP1).

    Abstract translation: 反激式DC-DC转换器在稳态运行期间以准谐振方式(QRC)自动振荡,采用回扫变压器,用于存储和传递能量到具有通过比较器(COMP1)比较电压的辅助绕组(AUS)的负载, 具有阈值(VREF1)以检测其交叉,并且因此通过控制触发器(FF)导通驱动所述变压器的初级绕组的功率晶体管(POWER),以实现新的能量传导和积聚阶段 持续时间由输出电压(ERROR AMP,CONTROL)的二级控制回路建立,以产生功率晶体管的关断,用于连续的能量传输阶段朝向在先前传导阶段期间存储在变压器中的能量的负载,具有 全集成控制电路,其包括存在于连接到初级绕组o的所述功率晶体管(POWER)的电流端子上的电压的第二比较器(HVCOMP) f变压器相对于电路的地电位; 具有连接到所述第二比较器(HVCOMP)的输出的第一输入和耦合到所述控制触发器(FF)的所述设置端的输出的逻辑门(OR); 延迟网络(ON DELAY)级联耦合到所述第一比较器(COMP1)的输出,并具有耦合到所述逻辑门(OR)的第二输入的输出,使得在转换器的稳态运行条件下,设置 的触发器(FF)由所述第二比较器(HVCOMP)而不是由所述第一比较器(COMP1)完成。

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