公开(公告)号：CA1135884A

公开(公告)日：1982-11-16

申请号：CA338457

申请日：1979-10-25

Applicant: SONY CORP

Inventor： HONGU MASAYUKI ,  OHMURO SHIGERU ,  TOKUHARA MASAHARU

IPC: H03J7/18 ,  H03J7/02 ,  H03J7/08 ,  H04N5/50 ,  H04B1/16

Abstract: An AFT circuit in which a frequency discriminated video intermediate frequency signal is supplied to a capacitor and a voltage across the capacitor is supplied to a variable reactance element of a tuner as an AFT voltage is disclosed. In this case, the AFT circuit includes a level comparing circuit for comparing the voltage across the capacitor with a reference voltage, a first switching element which is controlled by the level comparing circuit and forms a charging path for the capacitor, a second switching element which is controlled by the level comparing circuit and forms a discharging path for the capacitor, and a third switching element which will make the first and second switching elements OFF upon an AFT operation.

公开(公告)号：DE69323947D1

公开(公告)日：1999-04-22

申请号：DE69323947

申请日：1993-09-16

Applicant: SONY CORP

Inventor： KITA HIROYUKI ,  SARUGAKU TOSHIO ,  TOKUHARA MASAHARU

IPC: H04N9/64 ,  H04N9/78

Abstract: In a luminance and chrominance signal separation circuit, when comparing circuits thereof decide that the level of high-frequency components of a luminance signal is lower than a predetermined level, a switching circuit, controlled by a control circuit, selects and outputs a chrominance signal output from a band pass filter processing circuit.

公开(公告)号：DE68921536D1

公开(公告)日：1995-04-13

申请号：DE68921536

申请日：1989-10-12

Applicant: SONY CORP

Inventor： NAITO HIDEFUMI ,  SARUGAKU TOSHIO ,  TOKUHARA MASAHARU

IPC: H04N5/93 ,  H04N5/95 ,  H04N5/783

公开(公告)号：GB2221814B

公开(公告)日：1992-11-18

申请号：GB8916621

申请日：1989-07-20

Applicant: SONY CORP

Inventor： MOTOE HISAFUMI ,  KAWASHIMA HIROYUKI ,  TOKUHARA MASAHARU

IPC: H04N5/14

Abstract: A moving detection circuit which has a difference level generator which includes at least a frame delay circuit, and a vertical correlation detector which is connected to the difference signal generator and including a plurality of filters connected to the difference signal generator. A switching circuit for selecting one of the plurality of filters is provided and a control circuit is connected to the vertical correlation detector so as to control the switching circuit in response to the output level of the vertical correlation detector.

公开(公告)号：GB2221814A

公开(公告)日：1990-02-14

申请号：GB8916621

申请日：1989-07-20

Applicant: SONY CORP

Inventor： MOTOE HISAFUMI ,  KAWASHIMA HIROYUKI ,  TOKUHARA MASAHARU

IPC: H04N5/14

Abstract: A moving detection circuit which has a difference level generator which includes at least a frame delay circuit, and a vertical correlation detector which is connected to the difference signal generator and including a plurality of filters connected to the difference signal generator. A switching circuit for selecting one of the plurality of filters is provided and a control circuit is connected to the vertical correlation detector so as to control the switching circuit in response to the output level of the vertical correlation detector.

公开(公告)号：CA1240388A

公开(公告)日：1988-08-09

申请号：CA497054

申请日：1985-12-06

Applicant: SONY CORP

Inventor： KITA HIROYUKI ,  TOKUHARA MASAHARU ,  KAWASHIMA HIROYUKI

IPC: H04N11/20 ,  H04N5/12 ,  H04N7/01

Abstract: DIGITAL SCAN CONVERTOR A digital scan converter having an oscillator providing a clock signal used to scan-convert an input video signal to thereby produce a scan-converted output video signal, an automatic frequency control for controlling the oscillator in synchronism with a synchronizing signal separated from the input video signal and a counter for frequency-dividing the clock signal from the oscillator to thereby form a control signal used for controlling blanking of the input video signal. The counter also provides an address signal for a memory in which the video signal is temporarily stored during the scan converting operation. Since a composite blanking pulse for the input video signal is formed in synchronism with the address signal for the memory, it is possible to prevent appearance of a jitter of the composite blanking pulse on a display screen.

公开(公告)号：CA1132247A

公开(公告)日：1982-09-21

申请号：CA348559

申请日：1980-03-27

Applicant: SONY CORP

Inventor： YAMADA HISAFUMI ,  TOKUHARA MASAHARU ,  KURIKI CHOEI

IPC: H04N5/21 ,  H04N5/52 ,  H04N17/00

Abstract: A television receiver is disclosed in which there are provided a television signal receiving circuit including RF and IF stages; a video detector connected to the television signal receiving circuits; an AGC circuit connected between the video detector and television signal receiving circuit for automatically controlling the gain of the latter, the AGC circuit having a predetermined time constant; and a ghost detector connected to the video detector for detecting a ghost signal during a certain period in a vertical blanking period of the video signal from the video detector. In this case, a switching device is provided for switching the AGC circuit at least during the certain period the vertical blanking period such that the detected ghost level is not substantially influenced by the transient level change of the AGC circuit.

公开(公告)号：CA1121004A

公开(公告)日：1982-03-30

申请号：CA286714

申请日：1977-09-14

Applicant: SONY CORP

Inventor： HONGU MASAYUKI ,  KAWAKAMI HIROMI ,  TOKUHARA MASAHARU

IPC: H04N5/50

Abstract: A television receiver has an automatic fine tuning circuit with a first phase-locked loop including a first low pass filter and a synchronous video detector with a second phase-locked loop including a second low pass filter. A cut-off frequency of the first low pass filter is selected lower than a cut-off frequency of the second low pass filter, thereby enabling a stable operation of two phase-locked loops simultaneously.

公开(公告)号：CA1108250A

公开(公告)日：1981-09-01

申请号：CA299419

申请日：1978-03-21

Applicant: SONY CORP

Inventor： HONGU MASAYUKI ,  TOKUHARA MASAHARU ,  YAMAMOTO YOSHIHIRO ,  KAWAKAMI HIROMI

IPC: H04N5/455 ,  H03D1/00 ,  H03D1/04 ,  H03D1/22 ,  H03D3/18

Abstract: Demodulating apparatus for a modulated signal comprised of a carrier deriving circuit which is supplied with the modulated signal and which derives an unmodulated carrier therefrom, the carrier deriving circuit including a tuned circuit having a center frequency substantially coincident with the carrier frequency of the modulated signal and a limiter circuit, in which the limiter circuit imparts a phase shift to the signal supplied thereto in connection with its elimination of the amplitude fluctuations for eliminating amplitude fluctuations in the signal produced by the tuned circuit. A synchronous detector receives the modulated signal and the derived carrier so as to detect the modulated signal with the derived carrier. A phase shift circuit supplies the synchronous detector with a phase shifted modulated signal, the phase shift substantially compensating for the phase shift imparted by the limiter circuit in the carrier deriving circuit, whereby the modulated signal and the carrier which are applied to the synchronous detector are substantially in phase with each other.

公开(公告)号：CA1106491A

公开(公告)日：1981-08-04

申请号：CA299093

申请日：1978-03-16

Applicant: SONY CORP

Inventor： HONGU MASAYUKI ,  KAWAKAMI HIROMI ,  OHMURO SHIGERU ,  TOKUHARA MASAHARU

IPC: H04N5/60 ,  H03G3/34 ,  H04B1/10 ,  H04N5/44 ,  H04N5/455 ,  H04N5/58

Abstract: A muting circuit for a television or AM signal receiver provided with a synchronous detector. A television receiver has a synchronous detecting circuit which is followed by a white noise inverter. The white noise inverter includes a level detecting circuit which inverts not only a white noise to a black noise but also mutes an audio signal when an output signal from the synchronous detector exceeds a predetermined level.